cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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prom.c (2062B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 *
      4 * Copyright (C) 2012 Thomas Langer <thomas.langer@lantiq.com>
      5 * Copyright (C) 2012 John Crispin <john@phrozen.org>
      6 */
      7
      8#include <linux/kernel.h>
      9#include <asm/cacheflush.h>
     10#include <asm/traps.h>
     11#include <asm/io.h>
     12
     13#include <lantiq_soc.h>
     14
     15#include "../prom.h"
     16
     17#define SOC_FALCON	"Falcon"
     18#define SOC_FALCON_D	"Falcon-D"
     19#define SOC_FALCON_V	"Falcon-V"
     20#define SOC_FALCON_M	"Falcon-M"
     21
     22#define COMP_FALCON	"lantiq,falcon"
     23
     24#define PART_SHIFT	12
     25#define PART_MASK	0x0FFFF000
     26#define REV_SHIFT	28
     27#define REV_MASK	0xF0000000
     28#define SREV_SHIFT	22
     29#define SREV_MASK	0x03C00000
     30#define TYPE_SHIFT	26
     31#define TYPE_MASK	0x3C000000
     32
     33/* reset, nmi and ejtag exception vectors */
     34#define BOOT_REG_BASE	(KSEG1 | 0x1F200000)
     35#define BOOT_RVEC	(BOOT_REG_BASE | 0x00)
     36#define BOOT_NVEC	(BOOT_REG_BASE | 0x04)
     37#define BOOT_EVEC	(BOOT_REG_BASE | 0x08)
     38
     39void __init ltq_soc_nmi_setup(void)
     40{
     41	extern void (*nmi_handler)(void);
     42
     43	ltq_w32((unsigned long)&nmi_handler, (void *)BOOT_NVEC);
     44}
     45
     46void __init ltq_soc_ejtag_setup(void)
     47{
     48	extern void (*ejtag_debug_handler)(void);
     49
     50	ltq_w32((unsigned long)&ejtag_debug_handler, (void *)BOOT_EVEC);
     51}
     52
     53void __init ltq_soc_detect(struct ltq_soc_info *i)
     54{
     55	u32 type;
     56	i->partnum = (ltq_r32(FALCON_CHIPID) & PART_MASK) >> PART_SHIFT;
     57	i->rev = (ltq_r32(FALCON_CHIPID) & REV_MASK) >> REV_SHIFT;
     58	i->srev = ((ltq_r32(FALCON_CHIPCONF) & SREV_MASK) >> SREV_SHIFT);
     59	i->compatible = COMP_FALCON;
     60	i->type = SOC_TYPE_FALCON;
     61	sprintf(i->rev_type, "%c%d%d", (i->srev & 0x4) ? ('B') : ('A'),
     62		i->rev & 0x7, (i->srev & 0x3) + 1);
     63
     64	switch (i->partnum) {
     65	case SOC_ID_FALCON:
     66		type = (ltq_r32(FALCON_CHIPTYPE) & TYPE_MASK) >> TYPE_SHIFT;
     67		switch (type) {
     68		case 0:
     69			i->name = SOC_FALCON_D;
     70			break;
     71		case 1:
     72			i->name = SOC_FALCON_V;
     73			break;
     74		case 2:
     75			i->name = SOC_FALCON_M;
     76			break;
     77		default:
     78			i->name = SOC_FALCON;
     79			break;
     80		}
     81		break;
     82
     83	default:
     84		unreachable();
     85		break;
     86	}
     87
     88	board_nmi_handler_setup = ltq_soc_nmi_setup;
     89	board_ejtag_handler_setup = ltq_soc_ejtag_setup;
     90}