cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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prom.c (2231B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 *
      4 * Copyright (C) 2010 John Crispin <john@phrozen.org>
      5 */
      6
      7#include <linux/export.h>
      8#include <linux/clk.h>
      9#include <linux/memblock.h>
     10#include <linux/of_fdt.h>
     11
     12#include <asm/bootinfo.h>
     13#include <asm/time.h>
     14#include <asm/prom.h>
     15
     16#include <lantiq.h>
     17
     18#include "prom.h"
     19#include "clk.h"
     20
     21/* access to the ebu needs to be locked between different drivers */
     22DEFINE_SPINLOCK(ebu_lock);
     23EXPORT_SYMBOL_GPL(ebu_lock);
     24
     25/*
     26 * This is needed by the VPE loader code, just set it to 0 and assume
     27 * that the firmware hardcodes this value to something useful.
     28 */
     29unsigned long physical_memsize = 0L;
     30
     31/*
     32 * this struct is filled by the soc specific detection code and holds
     33 * information about the specific soc type, revision and name
     34 */
     35static struct ltq_soc_info soc_info;
     36
     37const char *get_system_type(void)
     38{
     39	return soc_info.sys_type;
     40}
     41
     42int ltq_soc_type(void)
     43{
     44	return soc_info.type;
     45}
     46
     47static void __init prom_init_cmdline(void)
     48{
     49	int argc = fw_arg0;
     50	char **argv = (char **) KSEG1ADDR(fw_arg1);
     51	int i;
     52
     53	arcs_cmdline[0] = '\0';
     54
     55	for (i = 0; i < argc; i++) {
     56		char *p = (char *) KSEG1ADDR(argv[i]);
     57
     58		if (CPHYSADDR(p) && *p) {
     59			strlcat(arcs_cmdline, p, sizeof(arcs_cmdline));
     60			strlcat(arcs_cmdline, " ", sizeof(arcs_cmdline));
     61		}
     62	}
     63}
     64
     65void __init plat_mem_setup(void)
     66{
     67	void *dtb;
     68
     69	ioport_resource.start = IOPORT_RESOURCE_START;
     70	ioport_resource.end = IOPORT_RESOURCE_END;
     71	iomem_resource.start = IOMEM_RESOURCE_START;
     72	iomem_resource.end = IOMEM_RESOURCE_END;
     73
     74	set_io_port_base((unsigned long) KSEG1);
     75
     76	dtb = get_fdt();
     77	if (dtb == NULL)
     78		panic("no dtb found");
     79
     80	/*
     81	 * Load the devicetree. This causes the chosen node to be
     82	 * parsed resulting in our memory appearing
     83	 */
     84	__dt_setup_arch(dtb);
     85}
     86
     87void __init prom_init(void)
     88{
     89	/* call the soc specific detetcion code and get it to fill soc_info */
     90	ltq_soc_detect(&soc_info);
     91	snprintf(soc_info.sys_type, LTQ_SYS_TYPE_LEN - 1, "%s rev %s",
     92		soc_info.name, soc_info.rev_type);
     93	soc_info.sys_type[LTQ_SYS_TYPE_LEN - 1] = '\0';
     94	pr_info("SoC: %s\n", soc_info.sys_type);
     95	prom_init_cmdline();
     96
     97#if defined(CONFIG_MIPS_MT_SMP)
     98	if (register_vsmp_smp_ops())
     99		panic("failed to register_vsmp_smp_ops()");
    100#endif
    101}