cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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r3k_dump_tlb.c (1693B)


      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * Dump R3000 TLB for debugging purposes.
      4 *
      5 * Copyright (C) 1994, 1995 by Waldorf Electronics, written by Ralf Baechle.
      6 * Copyright (C) 1999 by Silicon Graphics, Inc.
      7 * Copyright (C) 1999 by Harald Koerfgen
      8 */
      9#include <linux/kernel.h>
     10#include <linux/mm.h>
     11
     12#include <asm/mipsregs.h>
     13#include <asm/mmu_context.h>
     14#include <asm/page.h>
     15#include <asm/tlbdebug.h>
     16
     17void dump_tlb_regs(void)
     18{
     19	pr_info("Index    : %0x\n", read_c0_index());
     20	pr_info("EntryHi  : %0lx\n", read_c0_entryhi());
     21	pr_info("EntryLo  : %0lx\n", read_c0_entrylo0());
     22}
     23
     24static void dump_tlb(int first, int last)
     25{
     26	int	i;
     27	unsigned int asid;
     28	unsigned long entryhi, entrylo0, asid_mask;
     29
     30	asid_mask = cpu_asid_mask(&current_cpu_data);
     31	asid = read_c0_entryhi() & asid_mask;
     32
     33	for (i = first; i <= last; i++) {
     34		write_c0_index(i<<8);
     35		__asm__ __volatile__(
     36			".set\tnoreorder\n\t"
     37			"tlbr\n\t"
     38			"nop\n\t"
     39			".set\treorder");
     40		entryhi	 = read_c0_entryhi();
     41		entrylo0 = read_c0_entrylo0();
     42
     43		/* Unused entries have a virtual address of KSEG0.  */
     44		if ((entryhi & PAGE_MASK) != KSEG0 &&
     45		    (entrylo0 & R3K_ENTRYLO_G ||
     46		     (entryhi & asid_mask) == asid)) {
     47			/*
     48			 * Only print entries in use
     49			 */
     50			printk("Index: %2d ", i);
     51
     52			pr_cont("va=%08lx asid=%08lx"
     53				"  [pa=%06lx n=%d d=%d v=%d g=%d]",
     54				entryhi & PAGE_MASK,
     55				entryhi & asid_mask,
     56				entrylo0 & PAGE_MASK,
     57				(entrylo0 & R3K_ENTRYLO_N) ? 1 : 0,
     58				(entrylo0 & R3K_ENTRYLO_D) ? 1 : 0,
     59				(entrylo0 & R3K_ENTRYLO_V) ? 1 : 0,
     60				(entrylo0 & R3K_ENTRYLO_G) ? 1 : 0);
     61		}
     62	}
     63	printk("\n");
     64
     65	write_c0_entryhi(asid);
     66}
     67
     68void dump_tlb_all(void)
     69{
     70	dump_tlb(0, current_cpu_data.tlbsize - 1);
     71}