cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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env.c (1296B)

      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*
      3 * Based on Ocelot Linux port, which is
      4 * Copyright 2001 MontaVista Software Inc.
      5 * Author: jsun@mvista.com or jsun@junsun.net
      6 *
      7 * Copyright 2003 ICT CAS
      8 * Author: Michael Guo <guoyi@ict.ac.cn>
      9 *
     10 * Copyright (C) 2007 Lemote Inc. & Institute of Computing Technology
     11 * Author: Fuxin Zhang, zhangfx@lemote.com
     12 *
     13 * Copyright (C) 2009 Lemote Inc.
     14 * Author: Wu Zhangjin, wuzhangjin@gmail.com
     15 */
     16#include <linux/export.h>
     17#include <asm/bootinfo.h>
     18#include <asm/fw/fw.h>
     19#include <loongson.h>
     20
     21u32 cpu_clock_freq;
     22EXPORT_SYMBOL(cpu_clock_freq);
     23
     24void __init prom_init_env(void)
     25{
     26	/* pmon passes arguments in 32bit pointers */
     27	unsigned int processor_id;
     28
     29	cpu_clock_freq = fw_getenvl("cpuclock");
     30	memsize = fw_getenvl("memsize");
     31	highmemsize = fw_getenvl("highmemsize");
     32
     33	if (memsize == 0)
     34		memsize = 256;
     35
     36	pr_info("memsize=%u, highmemsize=%u\n", memsize, highmemsize);
     37
     38	if (cpu_clock_freq == 0) {
     39		processor_id = (&current_cpu_data)->processor_id;
     40		switch (processor_id & PRID_REV_MASK) {
     41		case PRID_REV_LOONGSON2E:
     42			cpu_clock_freq = 533080000;
     43			break;
     44		case PRID_REV_LOONGSON2F:
     45			cpu_clock_freq = 797000000;
     46			break;
     47		default:
     48			cpu_clock_freq = 100000000;
     49			break;
     50		}
     51	}
     52	pr_info("CpuClock = %u\n", cpu_clock_freq);
     53}