cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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malta-platform.c (2091B)

      1/*
      2 * This file is subject to the terms and conditions of the GNU General Public
      3 * License.  See the file "COPYING" in the main directory of this archive
      4 * for more details.
      5 *
      6 * Copyright (C) 2006, 07 MIPS Technologies, Inc.
      7 *   written by Ralf Baechle (ralf@linux-mips.org)
      8 *     written by Ralf Baechle <ralf@linux-mips.org>
      9 *
     10 * Copyright (C) 2008 Wind River Systems, Inc.
     11 *   updated by Tiejun Chen <tiejun.chen@windriver.com>
     12 *
     13 * 1. Probe driver for the Malta's UART ports:
     14 *
     15 *   o 2 ports in the SMC SuperIO
     16 *   o 1 port in the CBUS UART, a discrete 16550 which normally is only used
     17 *     for bringups.
     18 *
     19 * We don't use 8250_platform.c on Malta as it would result in the CBUS
     20 * UART becoming ttyS0.
     21 *
     22 * 2. Register RTC-CMOS platform device on Malta.
     23 */
     24#include <linux/init.h>
     25#include <linux/serial_8250.h>
     26#include <linux/irq.h>
     27#include <linux/platform_device.h>
     28#include <asm/mips-boards/maltaint.h>
     29
     30#define SMC_PORT(base, int)						\
     31{									\
     32	.iobase		= base,						\
     33	.irq		= int,						\
     34	.uartclk	= 1843200,					\
     35	.iotype		= UPIO_PORT,					\
     36	.flags		= UPF_BOOT_AUTOCONF | UPF_SKIP_TEST |		\
     37			  UPF_MAGIC_MULTIPLIER,				\
     38	.regshift	= 0,						\
     39}
     40
     41#define CBUS_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
     42
     43static struct plat_serial8250_port uart8250_data[] = {
     44	SMC_PORT(0x3F8, 4),
     45	SMC_PORT(0x2F8, 3),
     46#ifndef CONFIG_MIPS_CMP
     47	{
     48		.mapbase	= 0x1f000900,	/* The CBUS UART */
     49		.irq		= MIPS_CPU_IRQ_BASE + MIPSCPU_INT_MB2,
     50		.uartclk	= 3686400,	/* Twice the usual clk! */
     51		.iotype		= IS_ENABLED(CONFIG_CPU_BIG_ENDIAN) ?
     52				  UPIO_MEM32BE : UPIO_MEM32,
     53		.flags		= CBUS_UART_FLAGS,
     54		.regshift	= 3,
     55	},
     56#endif
     57	{ },
     58};
     59
     60static struct platform_device malta_uart8250_device = {
     61	.name			= "serial8250",
     62	.id			= PLAT8250_DEV_PLATFORM,
     63	.dev			= {
     64		.platform_data	= uart8250_data,
     65	},
     66};
     67
     68static struct platform_device *malta_devices[] __initdata = {
     69	&malta_uart8250_device,
     70};
     71
     72static int __init malta_add_devices(void)
     73{
     74	return platform_add_devices(malta_devices, ARRAY_SIZE(malta_devices));
     75}
     76
     77device_initcall(malta_add_devices);