cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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fixup-rc32434.c (2489B)

      1/*
      2 * Copyright 2001 MontaVista Software Inc.
      3 * Author: MontaVista Software, Inc.
      4 *         	stevel@mvista.com or source@mvista.com
      5 *
      6 *  This program is free software; you can redistribute  it and/or modify it
      7 *  under  the terms of  the GNU General  Public License as published by the
      8 *  Free Software Foundation;  either version 2 of the  License, or (at your
      9 *  option) any later version.
     10 *
     11 *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
     12 *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
     13 *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
     14 *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
     15 *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     16 *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
     17 *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
     18 *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
     19 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     20 *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     21 *
     22 *  You should have received a copy of the  GNU General Public License along
     23 *  with this program; if not, write  to the Free Software Foundation, Inc.,
     24 *  675 Mass Ave, Cambridge, MA 02139, USA.
     25 */
     26
     27#include <linux/types.h>
     28#include <linux/pci.h>
     29#include <linux/kernel.h>
     30
     31#include <asm/mach-rc32434/rc32434.h>
     32#include <asm/mach-rc32434/irq.h>
     33
     34static int irq_map[2][12] = {
     35	{0, 0, 2, 3, 2, 3, 0, 0, 0, 0, 0, 1},
     36	{0, 0, 1, 3, 0, 2, 1, 3, 0, 2, 1, 3}
     37};
     38
     39int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
     40{
     41	int irq = 0;
     42
     43	if (dev->bus->number < 2 && PCI_SLOT(dev->devfn) < 12)
     44		irq = irq_map[dev->bus->number][PCI_SLOT(dev->devfn)];
     45
     46	return irq + GROUP4_IRQ_BASE + 4;
     47}
     48
     49static void rc32434_pci_early_fixup(struct pci_dev *dev)
     50{
     51	if (PCI_SLOT(dev->devfn) == 6 && dev->bus->number == 0) {
     52		/* disable prefetched memory range */
     53		pci_write_config_word(dev, PCI_PREF_MEMORY_LIMIT, 0);
     54		pci_write_config_word(dev, PCI_PREF_MEMORY_BASE, 0x10);
     55
     56		pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 4);
     57	}
     58}
     59
     60/*
     61 * The fixup applies to both the IDT and VIA devices present on the board
     62 */
     63DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, rc32434_pci_early_fixup);
     64
     65/* Do platform specific device initialization at pci_enable_device() time */
     66int pcibios_plat_dev_init(struct pci_dev *dev)
     67{
     68	return 0;
     69}