cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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time.c (1201B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * Joshua Henderson <joshua.henderson@microchip.com>
      4 * Copyright (C) 2015 Microchip Technology Inc.  All rights reserved.
      5 */
      6#include <linux/clocksource.h>
      7#include <linux/init.h>
      8#include <linux/irqdomain.h>
      9#include <linux/of.h>
     10#include <linux/of_clk.h>
     11#include <linux/of_irq.h>
     12
     13#include <asm/time.h>
     14
     15#include "pic32mzda.h"
     16
     17static const struct of_device_id pic32_infra_match[] = {
     18	{ .compatible = "microchip,pic32mzda-infra", },
     19	{ },
     20};
     21
     22#define DEFAULT_CORE_TIMER_INTERRUPT 0
     23
     24static unsigned int pic32_xlate_core_timer_irq(void)
     25{
     26	struct device_node *node;
     27	unsigned int irq;
     28
     29	node = of_find_matching_node(NULL, pic32_infra_match);
     30
     31	if (WARN_ON(!node))
     32		goto default_map;
     33
     34	irq = irq_of_parse_and_map(node, 0);
     35
     36	of_node_put(node);
     37
     38	if (!irq)
     39		goto default_map;
     40
     41	return irq;
     42
     43default_map:
     44
     45	return irq_create_mapping(NULL, DEFAULT_CORE_TIMER_INTERRUPT);
     46}
     47
     48unsigned int get_c0_compare_int(void)
     49{
     50	return pic32_xlate_core_timer_irq();
     51}
     52
     53void __init plat_time_init(void)
     54{
     55	unsigned long rate = pic32_get_pbclk(7);
     56
     57	of_clk_init(NULL);
     58
     59	pr_info("CPU Clock: %ldMHz\n", rate / 1000000);
     60	mips_hpt_frequency = rate / 2;
     61
     62	timer_probe();
     63}