cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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reset.c (2125B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 *
      4 * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
      5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
      6 * Copyright (C) 2013 John Crispin <john@phrozen.org>
      7 */
      8
      9#include <linux/pm.h>
     10#include <linux/io.h>
     11#include <linux/of.h>
     12#include <linux/delay.h>
     13#include <linux/reset-controller.h>
     14
     15#include <asm/reboot.h>
     16
     17#include <asm/mach-ralink/ralink_regs.h>
     18
     19/* Reset Control */
     20#define SYSC_REG_RESET_CTRL	0x034
     21
     22#define RSTCTL_RESET_PCI	BIT(26)
     23#define RSTCTL_RESET_SYSTEM	BIT(0)
     24
     25static int ralink_assert_device(struct reset_controller_dev *rcdev,
     26				unsigned long id)
     27{
     28	u32 val;
     29
     30	if (id == 0)
     31		return -1;
     32
     33	val = rt_sysc_r32(SYSC_REG_RESET_CTRL);
     34	val |= BIT(id);
     35	rt_sysc_w32(val, SYSC_REG_RESET_CTRL);
     36
     37	return 0;
     38}
     39
     40static int ralink_deassert_device(struct reset_controller_dev *rcdev,
     41				  unsigned long id)
     42{
     43	u32 val;
     44
     45	if (id == 0)
     46		return -1;
     47
     48	val = rt_sysc_r32(SYSC_REG_RESET_CTRL);
     49	val &= ~BIT(id);
     50	rt_sysc_w32(val, SYSC_REG_RESET_CTRL);
     51
     52	return 0;
     53}
     54
     55static int ralink_reset_device(struct reset_controller_dev *rcdev,
     56			       unsigned long id)
     57{
     58	ralink_assert_device(rcdev, id);
     59	return ralink_deassert_device(rcdev, id);
     60}
     61
     62static const struct reset_control_ops reset_ops = {
     63	.reset = ralink_reset_device,
     64	.assert = ralink_assert_device,
     65	.deassert = ralink_deassert_device,
     66};
     67
     68static struct reset_controller_dev reset_dev = {
     69	.ops			= &reset_ops,
     70	.owner			= THIS_MODULE,
     71	.nr_resets		= 32,
     72	.of_reset_n_cells	= 1,
     73};
     74
     75void ralink_rst_init(void)
     76{
     77	reset_dev.of_node = of_find_compatible_node(NULL, NULL,
     78						"ralink,rt2880-reset");
     79	if (!reset_dev.of_node)
     80		pr_err("Failed to find reset controller node");
     81	else
     82		reset_controller_register(&reset_dev);
     83}
     84
     85static void ralink_restart(char *command)
     86{
     87	if (IS_ENABLED(CONFIG_PCI)) {
     88		rt_sysc_m32(0, RSTCTL_RESET_PCI, SYSC_REG_RESET_CTRL);
     89		mdelay(50);
     90	}
     91
     92	local_irq_disable();
     93	rt_sysc_w32(RSTCTL_RESET_SYSTEM, SYSC_REG_RESET_CTRL);
     94	unreachable();
     95}
     96
     97static int __init mips_reboot_setup(void)
     98{
     99	_machine_restart = ralink_restart;
    100
    101	return 0;
    102}
    103
    104arch_initcall(mips_reboot_setup);