cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ip22-hpc.c (1680B)


      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * ip22-hpc.c: Routines for generic manipulation of the HPC controllers.
      4 *
      5 * Copyright (C) 1996 David S. Miller (davem@davemloft.net)
      6 * Copyright (C) 1998 Ralf Baechle
      7 */
      8
      9#include <linux/export.h>
     10#include <linux/init.h>
     11#include <linux/types.h>
     12
     13#include <asm/io.h>
     14#include <asm/sgi/hpc3.h>
     15#include <asm/sgi/ioc.h>
     16#include <asm/sgi/ip22.h>
     17
     18struct hpc3_regs *hpc3c0, *hpc3c1;
     19
     20EXPORT_SYMBOL(hpc3c0);
     21EXPORT_SYMBOL(hpc3c1);
     22
     23struct sgioc_regs *sgioc;
     24
     25EXPORT_SYMBOL(sgioc);
     26
     27/* We need software copies of these because they are write only. */
     28u8 sgi_ioc_reset, sgi_ioc_write;
     29
     30extern char *system_type;
     31
     32void __init sgihpc_init(void)
     33{
     34	/* ioremap can't fail */
     35	hpc3c0 = (struct hpc3_regs *)
     36		 ioremap(HPC3_CHIP0_BASE, sizeof(struct hpc3_regs));
     37	hpc3c1 = (struct hpc3_regs *)
     38		 ioremap(HPC3_CHIP1_BASE, sizeof(struct hpc3_regs));
     39	/* IOC lives in PBUS PIO channel 6 */
     40	sgioc = (struct sgioc_regs *)hpc3c0->pbus_extregs[6];
     41
     42	hpc3c0->pbus_piocfg[6][0] |= HPC3_PIOCFG_DS16;
     43	if (ip22_is_fullhouse()) {
     44		/* Full House comes with INT2 which lives in PBUS PIO
     45		 * channel 4 */
     46		sgint = (struct sgint_regs *)hpc3c0->pbus_extregs[4];
     47		system_type = "SGI Indigo2";
     48	} else {
     49		/* Guiness comes with INT3 which is part of IOC */
     50		sgint = &sgioc->int3;
     51		system_type = "SGI Indy";
     52	}
     53
     54	sgi_ioc_reset = (SGIOC_RESET_PPORT | SGIOC_RESET_KBDMOUSE |
     55			 SGIOC_RESET_EISA | SGIOC_RESET_ISDN |
     56			 SGIOC_RESET_LC0OFF);
     57
     58	sgi_ioc_write = (SGIOC_WRITE_EASEL | SGIOC_WRITE_NTHRESH |
     59			 SGIOC_WRITE_TPSPEED | SGIOC_WRITE_EPSEL |
     60			 SGIOC_WRITE_U0AMODE | SGIOC_WRITE_U1AMODE);
     61
     62	sgioc->reset = sgi_ioc_reset;
     63	sgioc->write = sgi_ioc_write;
     64}