cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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ip22-nvram.c (3681B)

      1// SPDX-License-Identifier: GPL-2.0
      2/*
      3 * ip22-nvram.c: NVRAM and serial EEPROM handling.
      4 *
      5 * Copyright (C) 2003 Ladislav Michl (ladis@linux-mips.org)
      6 */
      7#include <linux/export.h>
      8
      9#include <asm/sgi/hpc3.h>
     10#include <asm/sgi/ip22.h>
     11
     12/* Control opcode for serial eeprom  */
     13#define EEPROM_READ	0xc000	/* serial memory read */
     14#define EEPROM_WEN	0x9800	/* write enable before prog modes */
     15#define EEPROM_WRITE	0xa000	/* serial memory write */
     16#define EEPROM_WRALL	0x8800	/* write all registers */
     17#define EEPROM_WDS	0x8000	/* disable all programming */
     18#define EEPROM_PRREAD	0xc000	/* read protect register */
     19#define EEPROM_PREN	0x9800	/* enable protect register mode */
     20#define EEPROM_PRCLEAR	0xffff	/* clear protect register */
     21#define EEPROM_PRWRITE	0xa000	/* write protect register */
     22#define EEPROM_PRDS	0x8000	/* disable protect register, forever */
     23
     24#define EEPROM_EPROT	0x01	/* Protect register enable */
     25#define EEPROM_CSEL	0x02	/* Chip select */
     26#define EEPROM_ECLK	0x04	/* EEPROM clock */
     27#define EEPROM_DATO	0x08	/* Data out */
     28#define EEPROM_DATI	0x10	/* Data in */
     29
     30/* We need to use these functions early... */
     31#define delay() ({						\
     32	int x;							\
     33	for (x=0; x<100000; x++) __asm__ __volatile__(""); })
     34
     35#define eeprom_cs_on(ptr) ({	\
     36	__raw_writel(__raw_readl(ptr) & ~EEPROM_DATO, ptr);	\
     37	__raw_writel(__raw_readl(ptr) & ~EEPROM_ECLK, ptr);	\
     38	__raw_writel(__raw_readl(ptr) & ~EEPROM_EPROT, ptr);	\
     39	delay();						\
     40	__raw_writel(__raw_readl(ptr) | EEPROM_CSEL, ptr);	\
     41	__raw_writel(__raw_readl(ptr) | EEPROM_ECLK, ptr); })
     42
     43
     44#define eeprom_cs_off(ptr) ({	\
     45	__raw_writel(__raw_readl(ptr) & ~EEPROM_ECLK, ptr);	\
     46	__raw_writel(__raw_readl(ptr) & ~EEPROM_CSEL, ptr);	\
     47	__raw_writel(__raw_readl(ptr) | EEPROM_EPROT, ptr);	\
     48	__raw_writel(__raw_readl(ptr) | EEPROM_ECLK, ptr); })
     49
     50#define BITS_IN_COMMAND 11
     51/*
     52 * clock in the nvram command and the register number. For the
     53 * national semiconductor nv ram chip the op code is 3 bits and
     54 * the address is 6/8 bits.
     55 */
     56static inline void eeprom_cmd(unsigned int *ctrl, unsigned cmd, unsigned reg)
     57{
     58	unsigned short ser_cmd;
     59	int i;
     60
     61	ser_cmd = cmd | (reg << (16 - BITS_IN_COMMAND));
     62	for (i = 0; i < BITS_IN_COMMAND; i++) {
     63		if (ser_cmd & (1<<15))	/* if high order bit set */
     64			__raw_writel(__raw_readl(ctrl) | EEPROM_DATO, ctrl);
     65		else
     66			__raw_writel(__raw_readl(ctrl) & ~EEPROM_DATO, ctrl);
     67		__raw_writel(__raw_readl(ctrl) & ~EEPROM_ECLK, ctrl);
     68		delay();
     69		__raw_writel(__raw_readl(ctrl) | EEPROM_ECLK, ctrl);
     70		delay();
     71		ser_cmd <<= 1;
     72	}
     73	/* see data sheet timing diagram */
     74	__raw_writel(__raw_readl(ctrl) & ~EEPROM_DATO, ctrl);
     75}
     76
     77unsigned short ip22_eeprom_read(unsigned int *ctrl, int reg)
     78{
     79	unsigned short res = 0;
     80	int i;
     81
     82	__raw_writel(__raw_readl(ctrl) & ~EEPROM_EPROT, ctrl);
     83	eeprom_cs_on(ctrl);
     84	eeprom_cmd(ctrl, EEPROM_READ, reg);
     85
     86	/* clock the data ouf of serial mem */
     87	for (i = 0; i < 16; i++) {
     88		__raw_writel(__raw_readl(ctrl) & ~EEPROM_ECLK, ctrl);
     89		delay();
     90		__raw_writel(__raw_readl(ctrl) | EEPROM_ECLK, ctrl);
     91		delay();
     92		res <<= 1;
     93		if (__raw_readl(ctrl) & EEPROM_DATI)
     94			res |= 1;
     95	}
     96
     97	eeprom_cs_off(ctrl);
     98
     99	return res;
    100}
    101
    102EXPORT_SYMBOL(ip22_eeprom_read);
    103
    104/*
    105 * Read specified register from main NVRAM
    106 */
    107unsigned short ip22_nvram_read(int reg)
    108{
    109	if (ip22_is_fullhouse())
    110		/* IP22 (Indigo2 aka FullHouse) stores env variables into
    111		 * 93CS56 Microwire Bus EEPROM 2048 Bit (128x16) */
    112		return ip22_eeprom_read(&hpc3c0->eeprom, reg);
    113	else {
    114		unsigned short tmp;
    115		/* IP24 (Indy aka Guiness) uses DS1386 8K version */
    116		reg <<= 1;
    117		tmp = hpc3c0->bbram[reg++] & 0xff;
    118		return (tmp << 8) | (hpc3c0->bbram[reg] & 0xff);
    119	}
    120}
    121
    122EXPORT_SYMBOL(ip22_nvram_read);