cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

mem_tx4927.c (2358B)

      1/*
      2 * common tx4927 memory interface
      3 *
      4 * Author: MontaVista Software, Inc.
      5 *	   source@mvista.com
      6 *
      7 * Copyright 2001-2002 MontaVista Software Inc.
      8 *
      9 *  This program is free software; you can redistribute it and/or modify it
     10 *  under the terms of the GNU General Public License as published by the
     11 *  Free Software Foundation; either version 2 of the License, or (at your
     12 *  option) any later version.
     13 *
     14 *  THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
     15 *  WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
     16 *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     17 *  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     18 *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     19 *  BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
     20 *  OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
     21 *  ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
     22 *  TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
     23 *  USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     24 *
     25 *  You should have received a copy of the GNU General Public License along
     26 *  with this program; if not, write to the Free Software Foundation, Inc.,
     27 *  675 Mass Ave, Cambridge, MA 02139, USA.
     28 */
     29
     30#include <linux/init.h>
     31#include <linux/types.h>
     32#include <linux/io.h>
     33#include <asm/txx9/tx4927.h>
     34
     35static unsigned int __init tx4927_process_sdccr(u64 __iomem *addr)
     36{
     37	u64 val;
     38	unsigned int sdccr_ce;
     39	unsigned int sdccr_bs;
     40	unsigned int sdccr_rs;
     41	unsigned int sdccr_cs;
     42	unsigned int sdccr_mw;
     43	unsigned int bs = 0;
     44	unsigned int rs = 0;
     45	unsigned int cs = 0;
     46	unsigned int mw = 0;
     47
     48	val = __raw_readq(addr);
     49
     50	/* MVMCP -- need #defs for these bits masks */
     51	sdccr_ce = ((val & (1 << 10)) >> 10);
     52	sdccr_bs = ((val & (1 << 8)) >> 8);
     53	sdccr_rs = ((val & (3 << 5)) >> 5);
     54	sdccr_cs = ((val & (7 << 2)) >> 2);
     55	sdccr_mw = ((val & (1 << 0)) >> 0);
     56
     57	if (sdccr_ce) {
     58		bs = 2 << sdccr_bs;
     59		rs = 2048 << sdccr_rs;
     60		cs = 256 << sdccr_cs;
     61		mw = 8 >> sdccr_mw;
     62	}
     63
     64	return rs * cs * mw * bs;
     65}
     66
     67unsigned int __init tx4927_get_mem_size(void)
     68{
     69	unsigned int total = 0;
     70	int i;
     71
     72	for (i = 0; i < ARRAY_SIZE(tx4927_sdramcptr->cr); i++)
     73		total += tx4927_process_sdccr(&tx4927_sdramcptr->cr[i]);
     74	return total;
     75}