cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pgtable-bits.h (1073B)


      1/*
      2 * Copyright (C) 2011 Tobias Klauser <tklauser@distanz.ch>
      3 * Copyright (C) 2009 Wind River Systems Inc
      4 *
      5 * This file is subject to the terms and conditions of the GNU General Public
      6 * License.  See the file "COPYING" in the main directory of this archive
      7 * for more details.
      8 */
      9
     10#ifndef _ASM_NIOS2_PGTABLE_BITS_H
     11#define _ASM_NIOS2_PGTABLE_BITS_H
     12
     13/*
     14 * These are actual hardware defined protection bits in the tlbacc register
     15 * which looks like this:
     16 *
     17 * 31 30 ... 26 25 24 23 22 21 20 19 18 ...  1  0
     18 * ignored........  C  R  W  X  G PFN............
     19 */
     20#define _PAGE_GLOBAL	(1<<20)
     21#define _PAGE_EXEC	(1<<21)
     22#define _PAGE_WRITE	(1<<22)
     23#define _PAGE_READ	(1<<23)
     24#define _PAGE_CACHED	(1<<24)	/* C: data access cacheable */
     25
     26/*
     27 * Software defined bits. They are ignored by the hardware and always read back
     28 * as zero, but can be written as non-zero.
     29 */
     30#define _PAGE_PRESENT	(1<<25)	/* PTE contains a translation */
     31#define _PAGE_ACCESSED	(1<<26)	/* page referenced */
     32#define _PAGE_DIRTY	(1<<27)	/* dirty page */
     33
     34#endif /* _ASM_NIOS2_PGTABLE_BITS_H */