cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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spr.h (991B)

      1/* SPDX-License-Identifier: GPL-2.0-or-later */
      2/*
      3 * OpenRISC Linux
      4 *
      5 * Linux architectural port borrowing liberally from similar works of
      6 * others.  All original copyrights apply as per the original source
      7 * declaration.
      8 *
      9 * OpenRISC implementation:
     10 * Copyright (C) 2010-2011 Jonas Bonn <jonas@southpole.se>
     11 */
     12
     13#ifndef __ASM_OPENRISC_SPR_H
     14#define __ASM_OPENRISC_SPR_H
     15
     16#define mtspr(_spr, _val) __asm__ __volatile__ (		\
     17	"l.mtspr r0,%1,%0"					\
     18	: : "K" (_spr), "r" (_val))
     19#define mtspr_off(_spr, _off, _val) __asm__ __volatile__ (	\
     20	"l.mtspr %0,%1,%2"					\
     21	: : "r" (_off), "r" (_val), "K" (_spr))
     22
     23static inline unsigned long mfspr(unsigned long add)
     24{
     25	unsigned long ret;
     26	__asm__ __volatile__ ("l.mfspr %0,r0,%1" : "=r" (ret) : "K" (add));
     27	return ret;
     28}
     29
     30static inline unsigned long mfspr_off(unsigned long add, unsigned long offset)
     31{
     32	unsigned long ret;
     33	__asm__ __volatile__ ("l.mfspr %0,%1,%2" : "=r" (ret)
     34						 : "r" (offset), "K" (add));
     35	return ret;
     36}
     37
     38#endif