cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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elf.h (14790B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifndef __ASMPARISC_ELF_H
      3#define __ASMPARISC_ELF_H
      4
      5/*
      6 * ELF register definitions..
      7 */
      8
      9#include <linux/types.h>
     10
     11#define EM_PARISC 15
     12
     13/* HPPA specific definitions.  */
     14
     15/* Legal values for e_flags field of Elf32_Ehdr.  */
     16
     17#define EF_PARISC_TRAPNIL	0x00010000 /* Trap nil pointer dereference.  */
     18#define EF_PARISC_EXT		0x00020000 /* Program uses arch. extensions. */
     19#define EF_PARISC_LSB		0x00040000 /* Program expects little endian. */
     20#define EF_PARISC_WIDE		0x00080000 /* Program expects wide mode.  */
     21#define EF_PARISC_NO_KABP	0x00100000 /* No kernel assisted branch
     22					      prediction.  */
     23#define EF_PARISC_LAZYSWAP	0x00400000 /* Allow lazy swapping.  */
     24#define EF_PARISC_ARCH		0x0000ffff /* Architecture version.  */
     25
     26/* Defined values for `e_flags & EF_PARISC_ARCH' are:  */
     27
     28#define EFA_PARISC_1_0		    0x020b /* PA-RISC 1.0 big-endian.  */
     29#define EFA_PARISC_1_1		    0x0210 /* PA-RISC 1.1 big-endian.  */
     30#define EFA_PARISC_2_0		    0x0214 /* PA-RISC 2.0 big-endian.  */
     31
     32/* Additional section indices.  */
     33
     34#define SHN_PARISC_ANSI_COMMON	0xff00	   /* Section for tenatively declared
     35					      symbols in ANSI C.  */
     36#define SHN_PARISC_HUGE_COMMON	0xff01	   /* Common blocks in huge model.  */
     37
     38/* Legal values for sh_type field of Elf32_Shdr.  */
     39
     40#define SHT_PARISC_EXT		0x70000000 /* Contains product specific ext. */
     41#define SHT_PARISC_UNWIND	0x70000001 /* Unwind information.  */
     42#define SHT_PARISC_DOC		0x70000002 /* Debug info for optimized code. */
     43
     44/* Legal values for sh_flags field of Elf32_Shdr.  */
     45
     46#define SHF_PARISC_SHORT	0x20000000 /* Section with short addressing. */
     47#define SHF_PARISC_HUGE		0x40000000 /* Section far from gp.  */
     48#define SHF_PARISC_SBP		0x80000000 /* Static branch prediction code. */
     49
     50/* Legal values for ST_TYPE subfield of st_info (symbol type).  */
     51
     52#define STT_PARISC_MILLICODE	13	/* Millicode function entry point.  */
     53
     54#define STT_HP_OPAQUE		(STT_LOOS + 0x1)
     55#define STT_HP_STUB		(STT_LOOS + 0x2)
     56
     57/* HPPA relocs.  */
     58
     59#define R_PARISC_NONE		0	/* No reloc.  */
     60#define R_PARISC_DIR32		1	/* Direct 32-bit reference.  */
     61#define R_PARISC_DIR21L		2	/* Left 21 bits of eff. address.  */
     62#define R_PARISC_DIR17R		3	/* Right 17 bits of eff. address.  */
     63#define R_PARISC_DIR17F		4	/* 17 bits of eff. address.  */
     64#define R_PARISC_DIR14R		6	/* Right 14 bits of eff. address.  */
     65#define R_PARISC_PCREL32	9	/* 32-bit rel. address.  */
     66#define R_PARISC_PCREL21L	10	/* Left 21 bits of rel. address.  */
     67#define R_PARISC_PCREL17R	11	/* Right 17 bits of rel. address.  */
     68#define R_PARISC_PCREL17F	12	/* 17 bits of rel. address.  */
     69#define R_PARISC_PCREL14R	14	/* Right 14 bits of rel. address.  */
     70#define R_PARISC_DPREL21L	18	/* Left 21 bits of rel. address.  */
     71#define R_PARISC_DPREL14R	22	/* Right 14 bits of rel. address.  */
     72#define R_PARISC_GPREL21L	26	/* GP-relative, left 21 bits.  */
     73#define R_PARISC_GPREL14R	30	/* GP-relative, right 14 bits.  */
     74#define R_PARISC_LTOFF21L	34	/* LT-relative, left 21 bits.  */
     75#define R_PARISC_LTOFF14R	38	/* LT-relative, right 14 bits.  */
     76#define R_PARISC_SECREL32	41	/* 32 bits section rel. address.  */
     77#define R_PARISC_SEGBASE	48	/* No relocation, set segment base.  */
     78#define R_PARISC_SEGREL32	49	/* 32 bits segment rel. address.  */
     79#define R_PARISC_PLTOFF21L	50	/* PLT rel. address, left 21 bits.  */
     80#define R_PARISC_PLTOFF14R	54	/* PLT rel. address, right 14 bits.  */
     81#define R_PARISC_LTOFF_FPTR32	57	/* 32 bits LT-rel. function pointer. */
     82#define R_PARISC_LTOFF_FPTR21L	58	/* LT-rel. fct ptr, left 21 bits. */
     83#define R_PARISC_LTOFF_FPTR14R	62	/* LT-rel. fct ptr, right 14 bits. */
     84#define R_PARISC_FPTR64		64	/* 64 bits function address.  */
     85#define R_PARISC_PLABEL32	65	/* 32 bits function address.  */
     86#define R_PARISC_PCREL64	72	/* 64 bits PC-rel. address.  */
     87#define R_PARISC_PCREL22F	74	/* 22 bits PC-rel. address.  */
     88#define R_PARISC_PCREL14WR	75	/* PC-rel. address, right 14 bits.  */
     89#define R_PARISC_PCREL14DR	76	/* PC rel. address, right 14 bits.  */
     90#define R_PARISC_PCREL16F	77	/* 16 bits PC-rel. address.  */
     91#define R_PARISC_PCREL16WF	78	/* 16 bits PC-rel. address.  */
     92#define R_PARISC_PCREL16DF	79	/* 16 bits PC-rel. address.  */
     93#define R_PARISC_DIR64		80	/* 64 bits of eff. address.  */
     94#define R_PARISC_DIR14WR	83	/* 14 bits of eff. address.  */
     95#define R_PARISC_DIR14DR	84	/* 14 bits of eff. address.  */
     96#define R_PARISC_DIR16F		85	/* 16 bits of eff. address.  */
     97#define R_PARISC_DIR16WF	86	/* 16 bits of eff. address.  */
     98#define R_PARISC_DIR16DF	87	/* 16 bits of eff. address.  */
     99#define R_PARISC_GPREL64	88	/* 64 bits of GP-rel. address.  */
    100#define R_PARISC_GPREL14WR	91	/* GP-rel. address, right 14 bits.  */
    101#define R_PARISC_GPREL14DR	92	/* GP-rel. address, right 14 bits.  */
    102#define R_PARISC_GPREL16F	93	/* 16 bits GP-rel. address.  */
    103#define R_PARISC_GPREL16WF	94	/* 16 bits GP-rel. address.  */
    104#define R_PARISC_GPREL16DF	95	/* 16 bits GP-rel. address.  */
    105#define R_PARISC_LTOFF64	96	/* 64 bits LT-rel. address.  */
    106#define R_PARISC_LTOFF14WR	99	/* LT-rel. address, right 14 bits.  */
    107#define R_PARISC_LTOFF14DR	100	/* LT-rel. address, right 14 bits.  */
    108#define R_PARISC_LTOFF16F	101	/* 16 bits LT-rel. address.  */
    109#define R_PARISC_LTOFF16WF	102	/* 16 bits LT-rel. address.  */
    110#define R_PARISC_LTOFF16DF	103	/* 16 bits LT-rel. address.  */
    111#define R_PARISC_SECREL64	104	/* 64 bits section rel. address.  */
    112#define R_PARISC_SEGREL64	112	/* 64 bits segment rel. address.  */
    113#define R_PARISC_PLTOFF14WR	115	/* PLT-rel. address, right 14 bits.  */
    114#define R_PARISC_PLTOFF14DR	116	/* PLT-rel. address, right 14 bits.  */
    115#define R_PARISC_PLTOFF16F	117	/* 16 bits LT-rel. address.  */
    116#define R_PARISC_PLTOFF16WF	118	/* 16 bits PLT-rel. address.  */
    117#define R_PARISC_PLTOFF16DF	119	/* 16 bits PLT-rel. address.  */
    118#define R_PARISC_LTOFF_FPTR64	120	/* 64 bits LT-rel. function ptr.  */
    119#define R_PARISC_LTOFF_FPTR14WR	123	/* LT-rel. fct. ptr., right 14 bits. */
    120#define R_PARISC_LTOFF_FPTR14DR	124	/* LT-rel. fct. ptr., right 14 bits. */
    121#define R_PARISC_LTOFF_FPTR16F	125	/* 16 bits LT-rel. function ptr.  */
    122#define R_PARISC_LTOFF_FPTR16WF	126	/* 16 bits LT-rel. function ptr.  */
    123#define R_PARISC_LTOFF_FPTR16DF	127	/* 16 bits LT-rel. function ptr.  */
    124#define R_PARISC_LORESERVE	128
    125#define R_PARISC_COPY		128	/* Copy relocation.  */
    126#define R_PARISC_IPLT		129	/* Dynamic reloc, imported PLT */
    127#define R_PARISC_EPLT		130	/* Dynamic reloc, exported PLT */
    128#define R_PARISC_TPREL32	153	/* 32 bits TP-rel. address.  */
    129#define R_PARISC_TPREL21L	154	/* TP-rel. address, left 21 bits.  */
    130#define R_PARISC_TPREL14R	158	/* TP-rel. address, right 14 bits.  */
    131#define R_PARISC_LTOFF_TP21L	162	/* LT-TP-rel. address, left 21 bits. */
    132#define R_PARISC_LTOFF_TP14R	166	/* LT-TP-rel. address, right 14 bits.*/
    133#define R_PARISC_LTOFF_TP14F	167	/* 14 bits LT-TP-rel. address.  */
    134#define R_PARISC_TPREL64	216	/* 64 bits TP-rel. address.  */
    135#define R_PARISC_TPREL14WR	219	/* TP-rel. address, right 14 bits.  */
    136#define R_PARISC_TPREL14DR	220	/* TP-rel. address, right 14 bits.  */
    137#define R_PARISC_TPREL16F	221	/* 16 bits TP-rel. address.  */
    138#define R_PARISC_TPREL16WF	222	/* 16 bits TP-rel. address.  */
    139#define R_PARISC_TPREL16DF	223	/* 16 bits TP-rel. address.  */
    140#define R_PARISC_LTOFF_TP64	224	/* 64 bits LT-TP-rel. address.  */
    141#define R_PARISC_LTOFF_TP14WR	227	/* LT-TP-rel. address, right 14 bits.*/
    142#define R_PARISC_LTOFF_TP14DR	228	/* LT-TP-rel. address, right 14 bits.*/
    143#define R_PARISC_LTOFF_TP16F	229	/* 16 bits LT-TP-rel. address.  */
    144#define R_PARISC_LTOFF_TP16WF	230	/* 16 bits LT-TP-rel. address.  */
    145#define R_PARISC_LTOFF_TP16DF	231	/* 16 bits LT-TP-rel. address.  */
    146#define R_PARISC_HIRESERVE	255
    147
    148#define PA_PLABEL_FDESC		0x02	/* bit set if PLABEL points to
    149					 * a function descriptor, not
    150					 * an address */
    151
    152/* The following are PA function descriptors 
    153 *
    154 * addr:	the absolute address of the function
    155 * gp:		either the data pointer (r27) for non-PIC code or
    156 *		the PLT pointer (r19) for PIC code */
    157
    158/* Format for the Elf32 Function descriptor */
    159typedef struct elf32_fdesc {
    160	__u32	addr;
    161	__u32	gp;
    162} Elf32_Fdesc;
    163
    164/* Format for the Elf64 Function descriptor */
    165typedef struct elf64_fdesc {
    166	__u64	dummy[2]; /* FIXME: nothing uses these, why waste
    167			   * the space */
    168	__u64	addr;
    169	__u64	gp;
    170} Elf64_Fdesc;
    171
    172#ifdef CONFIG_64BIT
    173#define Elf_Fdesc	Elf64_Fdesc
    174#else
    175#define Elf_Fdesc	Elf32_Fdesc
    176#endif /*CONFIG_64BIT*/
    177
    178/* Legal values for p_type field of Elf32_Phdr/Elf64_Phdr.  */
    179
    180#define PT_HP_TLS		(PT_LOOS + 0x0)
    181#define PT_HP_CORE_NONE		(PT_LOOS + 0x1)
    182#define PT_HP_CORE_VERSION	(PT_LOOS + 0x2)
    183#define PT_HP_CORE_KERNEL	(PT_LOOS + 0x3)
    184#define PT_HP_CORE_COMM		(PT_LOOS + 0x4)
    185#define PT_HP_CORE_PROC		(PT_LOOS + 0x5)
    186#define PT_HP_CORE_LOADABLE	(PT_LOOS + 0x6)
    187#define PT_HP_CORE_STACK	(PT_LOOS + 0x7)
    188#define PT_HP_CORE_SHM		(PT_LOOS + 0x8)
    189#define PT_HP_CORE_MMF		(PT_LOOS + 0x9)
    190#define PT_HP_PARALLEL		(PT_LOOS + 0x10)
    191#define PT_HP_FASTBIND		(PT_LOOS + 0x11)
    192#define PT_HP_OPT_ANNOT		(PT_LOOS + 0x12)
    193#define PT_HP_HSL_ANNOT		(PT_LOOS + 0x13)
    194#define PT_HP_STACK		(PT_LOOS + 0x14)
    195
    196#define PT_PARISC_ARCHEXT	0x70000000
    197#define PT_PARISC_UNWIND	0x70000001
    198
    199/* Legal values for p_flags field of Elf32_Phdr/Elf64_Phdr.  */
    200
    201#define PF_PARISC_SBP		0x08000000
    202
    203#define PF_HP_PAGE_SIZE		0x00100000
    204#define PF_HP_FAR_SHARED	0x00200000
    205#define PF_HP_NEAR_SHARED	0x00400000
    206#define PF_HP_CODE		0x01000000
    207#define PF_HP_MODIFY		0x02000000
    208#define PF_HP_LAZYSWAP		0x04000000
    209#define PF_HP_SBP		0x08000000
    210
    211/*
    212 * This yields a string that ld.so will use to load implementation
    213 * specific libraries for optimization.  This is more specific in
    214 * intent than poking at uname or /proc/cpuinfo.
    215 */
    216
    217#define ELF_PLATFORM  ("PARISC")
    218
    219/*
    220 * The following definitions are those for 32-bit ELF binaries on a 32-bit
    221 * kernel and for 64-bit binaries on a 64-bit kernel.  To run 32-bit binaries
    222 * on a 64-bit kernel, fs/compat_binfmt_elf.c defines ELF_CLASS and then
    223 * #includes binfmt_elf.c, which then includes this file.
    224 */
    225#ifndef ELF_CLASS
    226
    227#ifdef CONFIG_64BIT
    228#define ELF_CLASS	ELFCLASS64
    229#else
    230#define ELF_CLASS	ELFCLASS32
    231#endif
    232
    233typedef unsigned long elf_greg_t;
    234
    235#define SET_PERSONALITY(ex) \
    236({	\
    237	set_personality((current->personality & ~PER_MASK) | PER_LINUX); \
    238	clear_thread_flag(TIF_32BIT); \
    239	current->thread.map_base = DEFAULT_MAP_BASE; \
    240	current->thread.task_size = DEFAULT_TASK_SIZE; \
    241 })
    242
    243#endif /* ! ELF_CLASS */
    244
    245#define COMPAT_SET_PERSONALITY(ex) \
    246({	\
    247	if ((ex).e_ident[EI_CLASS] == ELFCLASS32) { \
    248		set_thread_flag(TIF_32BIT); \
    249		current->thread.map_base = DEFAULT_MAP_BASE32; \
    250		current->thread.task_size = DEFAULT_TASK_SIZE32; \
    251	} else clear_thread_flag(TIF_32BIT); \
    252 })
    253
    254/*
    255 * Fill in general registers in a core dump.  This saves pretty
    256 * much the same registers as hp-ux, although in a different order.
    257 * Registers marked # below are not currently saved in pt_regs, so
    258 * we use their current values here.
    259 *
    260 * 	gr0..gr31
    261 * 	sr0..sr7
    262 * 	iaoq0..iaoq1
    263 * 	iasq0..iasq1
    264 * 	cr11 (sar)
    265 * 	cr19 (iir)
    266 * 	cr20 (isr)
    267 * 	cr21 (ior)
    268 *  #	cr22 (ipsw)
    269 *  #	cr0 (recovery counter)
    270 *  #	cr24..cr31 (temporary registers)
    271 *  #	cr8,9,12,13 (protection IDs)
    272 *  #	cr10 (scr/ccr)
    273 *  #	cr15 (ext int enable mask)
    274 *
    275 */
    276
    277#define ELF_CORE_COPY_REGS(dst, pt)	\
    278	memset(dst, 0, sizeof(dst));	/* don't leak any "random" bits */ \
    279	{	int i; \
    280		for (i = 0; i < 32; i++) dst[i] = pt->gr[i]; \
    281		for (i = 0; i < 8; i++) dst[32 + i] = pt->sr[i]; \
    282	} \
    283	dst[40] = pt->iaoq[0]; dst[41] = pt->iaoq[1]; \
    284	dst[42] = pt->iasq[0]; dst[43] = pt->iasq[1]; \
    285	dst[44] = pt->sar;   dst[45] = pt->iir; \
    286	dst[46] = pt->isr;   dst[47] = pt->ior; \
    287	dst[48] = mfctl(22); dst[49] = mfctl(0); \
    288	dst[50] = mfctl(24); dst[51] = mfctl(25); \
    289	dst[52] = mfctl(26); dst[53] = mfctl(27); \
    290	dst[54] = mfctl(28); dst[55] = mfctl(29); \
    291	dst[56] = mfctl(30); dst[57] = mfctl(31); \
    292	dst[58] = mfctl( 8); dst[59] = mfctl( 9); \
    293	dst[60] = mfctl(12); dst[61] = mfctl(13); \
    294	dst[62] = mfctl(10); dst[63] = mfctl(15);
    295
    296#define CORE_DUMP_USE_REGSET
    297
    298#define ELF_NGREG 80	/* We only need 64 at present, but leave space
    299			   for expansion. */
    300typedef elf_greg_t elf_gregset_t[ELF_NGREG];
    301
    302#define ELF_NFPREG 32
    303typedef double elf_fpreg_t;
    304typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
    305
    306struct task_struct;
    307
    308struct pt_regs;	/* forward declaration... */
    309
    310
    311#define elf_check_arch(x)		\
    312	((x)->e_machine == EM_PARISC && (x)->e_ident[EI_CLASS] == ELF_CLASS)
    313#define compat_elf_check_arch(x)	\
    314	((x)->e_machine == EM_PARISC && (x)->e_ident[EI_CLASS] == ELFCLASS32)
    315
    316/*
    317 * These are used to set parameters in the core dumps.
    318 */
    319#define ELF_DATA	ELFDATA2MSB
    320#define ELF_ARCH	EM_PARISC
    321#define ELF_OSABI 	ELFOSABI_LINUX
    322
    323/* %r23 is set by ld.so to a pointer to a function which might be 
    324   registered using atexit.  This provides a means for the dynamic
    325   linker to call DT_FINI functions for shared libraries that have
    326   been loaded before the code runs.
    327
    328   So that we can use the same startup file with static executables,
    329   we start programs with a value of 0 to indicate that there is no
    330   such function.  */
    331#define ELF_PLAT_INIT(_r, load_addr)       _r->gr[23] = 0
    332
    333#define ELF_EXEC_PAGESIZE	4096
    334
    335/* This is the location that an ET_DYN program is loaded if exec'ed.  Typical
    336   use of this is to invoke "./ld.so someprog" to test out a new version of
    337   the loader.  We need to make sure that it is out of the way of the program
    338   that it will "exec", and that there is sufficient room for the brk.
    339
    340   (2 * TASK_SIZE / 3) turns into something undefined when run through a
    341   32 bit preprocessor and in some cases results in the kernel trying to map
    342   ld.so to the kernel virtual base. Use a sane value instead. /Jes 
    343  */
    344
    345#define ELF_ET_DYN_BASE         (TASK_UNMAPPED_BASE + 0x01000000)
    346
    347/* This yields a mask that user programs can use to figure out what
    348   instruction set this CPU supports.  This could be done in user space,
    349   but it's not easy, and we've already done it here.  */
    350
    351#define ELF_HWCAP	0
    352
    353/* Masks for stack and mmap randomization */
    354#define BRK_RND_MASK	(is_32bit_task() ? 0x07ffUL : 0x3ffffUL)
    355#define MMAP_RND_MASK	(is_32bit_task() ? 0x1fffUL : 0x3ffffUL)
    356#define STACK_RND_MASK	MMAP_RND_MASK
    357
    358struct mm_struct;
    359extern unsigned long arch_randomize_brk(struct mm_struct *);
    360#define arch_randomize_brk arch_randomize_brk
    361
    362
    363#define ARCH_HAS_SETUP_ADDITIONAL_PAGES 1
    364struct linux_binprm;
    365extern int arch_setup_additional_pages(struct linux_binprm *bprm,
    366					int executable_stack);
    367#define VDSO_AUX_ENT(a, b) NEW_AUX_ENT(a, b)
    368#define VDSO_CURRENT_BASE current->mm->context.vdso_base
    369
    370#define ARCH_DLINFO						\
    371do {								\
    372	if (VDSO_CURRENT_BASE) {				\
    373		NEW_AUX_ENT(AT_SYSINFO_EHDR, VDSO_CURRENT_BASE);\
    374	}							\
    375} while (0)
    376
    377#endif