cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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psw.h (2464B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifndef _PARISC_PSW_H
      3#define _PARISC_PSW_H
      4
      5#define	PSW_I	0x00000001
      6#define	PSW_D	0x00000002
      7#define	PSW_P	0x00000004
      8#define	PSW_Q	0x00000008
      9
     10#define	PSW_R	0x00000010
     11#define	PSW_F	0x00000020
     12#define	PSW_G	0x00000040	/* PA1.x only */
     13#define PSW_O	0x00000080	/* PA2.0 only */
     14
     15/* ssm/rsm instructions number PSW_W and PSW_E differently */
     16#define PSW_SM_I	PSW_I	/* Enable External Interrupts */
     17#define PSW_SM_D	PSW_D
     18#define PSW_SM_P	PSW_P
     19#define PSW_SM_Q	PSW_Q	/* Enable Interrupt State Collection */
     20#define PSW_SM_R	PSW_R	/* Enable Recover Counter Trap */
     21#define PSW_SM_W	0x200	/* PA2.0 only : Enable Wide Mode */
     22
     23#define PSW_SM_QUIET	PSW_SM_R+PSW_SM_Q+PSW_SM_P+PSW_SM_D+PSW_SM_I
     24
     25#define PSW_CB	0x0000ff00
     26
     27#define	PSW_M	0x00010000
     28#define	PSW_V	0x00020000
     29#define	PSW_C	0x00040000
     30#define	PSW_B	0x00080000
     31
     32#define	PSW_X	0x00100000
     33#define	PSW_N	0x00200000
     34#define	PSW_L	0x00400000
     35#define	PSW_H	0x00800000
     36
     37#define	PSW_T	0x01000000
     38#define	PSW_S	0x02000000
     39#define	PSW_E	0x04000000
     40#define PSW_W	0x08000000	/* PA2.0 only */
     41#define PSW_W_BIT       36      /* PA2.0 only */
     42
     43#define	PSW_Z	0x40000000	/* PA1.x only */
     44#define	PSW_Y	0x80000000	/* PA1.x only */
     45
     46#ifdef CONFIG_64BIT
     47#  define PSW_HI_CB 0x000000ff    /* PA2.0 only */
     48#endif
     49
     50#ifdef CONFIG_64BIT
     51#  define USER_PSW_HI_MASK	PSW_HI_CB
     52#  define WIDE_PSW		PSW_W
     53#else 
     54#  define WIDE_PSW		0
     55#endif
     56
     57/* Used when setting up for rfi */
     58#define KERNEL_PSW    (WIDE_PSW | PSW_C | PSW_Q | PSW_P | PSW_D)
     59#define REAL_MODE_PSW (WIDE_PSW | PSW_Q)
     60#define USER_PSW_MASK (WIDE_PSW | PSW_T | PSW_N | PSW_X | PSW_B | PSW_V | PSW_CB)
     61#define USER_PSW      (PSW_C | PSW_Q | PSW_P | PSW_D | PSW_I)
     62
     63#ifndef __ASSEMBLY__
     64
     65/* The program status word as bitfields.  */
     66struct pa_psw {
     67	unsigned int y:1;
     68	unsigned int z:1;
     69	unsigned int rv:2;
     70	unsigned int w:1;
     71	unsigned int e:1;
     72	unsigned int s:1;
     73	unsigned int t:1;
     74
     75	unsigned int h:1;
     76	unsigned int l:1;
     77	unsigned int n:1;
     78	unsigned int x:1;
     79	unsigned int b:1;
     80	unsigned int c:1;
     81	unsigned int v:1;
     82	unsigned int m:1;
     83
     84	unsigned int cb:8;
     85
     86	unsigned int o:1;
     87	unsigned int g:1;
     88	unsigned int f:1;
     89	unsigned int r:1;
     90	unsigned int q:1;
     91	unsigned int p:1;
     92	unsigned int d:1;
     93	unsigned int i:1;
     94};
     95
     96#ifdef CONFIG_64BIT
     97#define pa_psw(task) ((struct pa_psw *) ((char *) (task) + TASK_PT_PSW + 4))
     98#else
     99#define pa_psw(task) ((struct pa_psw *) ((char *) (task) + TASK_PT_PSW))
    100#endif
    101
    102#endif /* !__ASSEMBLY__ */
    103
    104#endif