cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

cm5200.dts (1338B)

      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*
      3 * CM5200 board Device Tree Source
      4 *
      5 * Copyright (C) 2007 Semihalf
      6 * Marian Balakowicz <m8@semihalf.com>
      7 */
      8
      9/include/ "mpc5200b.dtsi"
     10
     11&gpt0 { fsl,has-wdt; };
     12
     13/ {
     14	model = "schindler,cm5200";
     15	compatible = "schindler,cm5200";
     16
     17	soc5200@f0000000 {
     18		can@900 {
     19			status = "disabled";
     20		};
     21
     22		can@980 {
     23			status = "disabled";
     24		};
     25
     26		psc@2000 {		// PSC1
     27			compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
     28		};
     29
     30		psc@2200 {		// PSC2
     31			compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
     32		};
     33
     34		psc@2400 {		// PSC3
     35			compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
     36		};
     37
     38		psc@2600 {		// PSC4
     39			status = "disabled";
     40		};
     41
     42		psc@2800 {		// PSC5
     43			status = "disabled";
     44		};
     45
     46		psc@2c00 {		// PSC6
     47			compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
     48		};
     49
     50		ethernet@3000 {
     51			phy-handle = <&phy0>;
     52		};
     53
     54		mdio@3000 {
     55			phy0: ethernet-phy@0 {
     56				reg = <0>;
     57			};
     58		};
     59
     60		ata@3a00 {
     61			status = "disabled";
     62		};
     63
     64		i2c@3d00 {
     65			status = "disabled";
     66		};
     67
     68	};
     69
     70	pci@f0000d00 {
     71		status = "disabled";
     72	};
     73
     74	localbus {
     75		// 16-bit flash device at LocalPlus Bus CS0
     76		flash@0,0 {
     77			compatible = "cfi-flash";
     78			reg = <0 0 0x2000000>;
     79			bank-width = <2>;
     80			device-width = <2>;
     81			#size-cells = <1>;
     82			#address-cells = <1>;
     83		};
     84	};
     85};