cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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bsc9132si-post.dtsi (5048B)


      1/*
      2 * BSC9132 Silicon/SoC Device Tree Source (post include)
      3 *
      4 * Copyright 2014 Freescale Semiconductor Inc.
      5 *
      6 * Redistribution and use in source and binary forms, with or without
      7 * modification, are permitted provided that the following conditions are met:
      8 *     * Redistributions of source code must retain the above copyright
      9 *       notice, this list of conditions and the following disclaimer.
     10 *     * Redistributions in binary form must reproduce the above copyright
     11 *       notice, this list of conditions and the following disclaimer in the
     12 *       documentation and/or other materials provided with the distribution.
     13 *     * Neither the name of Freescale Semiconductor nor the
     14 *       names of its contributors may be used to endorse or promote products
     15 *       derived from this software without specific prior written permission.
     16 *
     17 *
     18 * ALTERNATIVELY, this software may be distributed under the terms of the
     19 * GNU General Public License ("GPL") as published by the Free Software
     20 * Foundation, either version 2 of that License or (at your option) any
     21 * later version.
     22 *
     23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
     24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
     27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
     30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
     32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     33 */
     34
     35&ifc {
     36	#address-cells = <2>;
     37	#size-cells = <1>;
     38	compatible = "fsl,ifc", "simple-bus";
     39	/* FIXME: Test whether interrupts are split */
     40	interrupts = <16 2 0 0 20 2 0 0>;
     41};
     42
     43/* controller at 0xa000 */
     44&pci0 {
     45	compatible = "fsl,bsc9132-pcie", "fsl,qoriq-pcie-v2.2";
     46	device_type = "pci";
     47	#size-cells = <2>;
     48	#address-cells = <3>;
     49	bus-range = <0 255>;
     50	interrupts = <16 2 0 0>;
     51
     52	pcie@0 {
     53		reg = <0 0 0 0 0>;
     54		#interrupt-cells = <1>;
     55		#size-cells = <2>;
     56		#address-cells = <3>;
     57		device_type = "pci";
     58		interrupts = <16 2 0 0>;
     59		interrupt-map-mask = <0xf800 0 0 7>;
     60
     61		interrupt-map = <
     62			/* IDSEL 0x0 */
     63			0000 0x0 0x0 0x1 &mpic 0x0 0x2 0x0 0x0
     64			0000 0x0 0x0 0x2 &mpic 0x1 0x2 0x0 0x0
     65			0000 0x0 0x0 0x3 &mpic 0x2 0x2 0x0 0x0
     66			0000 0x0 0x0 0x4 &mpic 0x3 0x2 0x0 0x0
     67			>;
     68	};
     69};
     70
     71&soc {
     72	#address-cells = <1>;
     73	#size-cells = <1>;
     74	device_type = "soc";
     75	compatible = "fsl,bsc9132-immr", "simple-bus";
     76	bus-frequency = <0>;		// Filled out by uboot.
     77
     78	ecm-law@0 {
     79		compatible = "fsl,ecm-law";
     80		reg = <0x0 0x1000>;
     81		fsl,num-laws = <12>;
     82	};
     83
     84	ecm@1000 {
     85		compatible = "fsl,bsc9132-ecm", "fsl,ecm";
     86		reg = <0x1000 0x1000>;
     87		interrupts = <16 2 0 0>;
     88	};
     89
     90	memory-controller@2000 {
     91		compatible = "fsl,bsc9132-memory-controller";
     92		reg = <0x2000 0x1000>;
     93		interrupts = <16 2 1 8>;
     94	};
     95
     96/include/ "pq3-i2c-0.dtsi"
     97	i2c@3000 {
     98		interrupts = <17 2 0 0>;
     99	};
    100
    101/include/ "pq3-i2c-1.dtsi"
    102	i2c@3100 {
    103		interrupts = <17 2 0 0>;
    104	};
    105
    106/include/ "pq3-duart-0.dtsi"
    107	serial0: serial@4500 {
    108		interrupts = <18 2 0 0>;
    109	};
    110
    111	serial1: serial@4600 {
    112		interrupts = <18 2 0 0 >;
    113	};
    114/include/ "pq3-espi-0.dtsi"
    115	spi0: spi@7000 {
    116		fsl,espi-num-chipselects = <1>;
    117		interrupts = <22 0x2 0 0>;
    118	};
    119
    120/include/ "pq3-gpio-0.dtsi"
    121	gpio-controller@f000 {
    122		interrupts = <19 0x2 0 0>;
    123		};
    124
    125	L2: l2-cache-controller@20000 {
    126		compatible = "fsl,bsc9132-l2-cache-controller";
    127		reg = <0x20000 0x1000>;
    128		cache-line-size = <32>;	// 32 bytes
    129		cache-size = <0x40000>; // L2,256K
    130		interrupts = <16 2 1 0>;
    131	};
    132
    133/include/ "pq3-dma-0.dtsi"
    134
    135dma@21300 {
    136
    137	dma-channel@0 {
    138		interrupts = <62 2 0 0>;
    139	};
    140
    141	dma-channel@80 {
    142		interrupts = <63 2 0 0>;
    143	};
    144
    145	dma-channel@100 {
    146		interrupts = <64 2 0 0>;
    147	};
    148
    149	dma-channel@180 {
    150		interrupts = <65 2 0 0>;
    151	};
    152};
    153
    154/include/ "pq3-usb2-dr-0.dtsi"
    155usb@22000 {
    156	compatible = "fsl-usb2-dr","fsl-usb2-dr-v2.2";
    157	interrupts = <40 0x2 0 0>;
    158};
    159
    160/include/ "pq3-esdhc-0.dtsi"
    161	sdhc@2e000 {
    162		fsl,sdhci-auto-cmd12;
    163		interrupts = <41 0x2 0 0>;
    164	};
    165
    166/include/ "pq3-sec4.4-0.dtsi"
    167crypto@30000 {
    168	interrupts	 = <57 2 0 0>;
    169
    170	sec_jr0: jr@1000 {
    171		interrupts	 = <58 2 0 0>;
    172	};
    173
    174	sec_jr1: jr@2000 {
    175		interrupts	 = <59 2 0 0>;
    176	};
    177
    178	sec_jr2: jr@3000 {
    179		interrupts	 = <60 2 0 0>;
    180	};
    181
    182	sec_jr3: jr@4000 {
    183		interrupts	 = <61 2 0 0>;
    184	};
    185};
    186
    187/include/ "pq3-mpic.dtsi"
    188/include/ "pq3-mpic-timer-B.dtsi"
    189
    190/include/ "pq3-etsec2-0.dtsi"
    191enet0: ethernet@b0000 {
    192	queue-group@b0000 {
    193		interrupts = <26 2 0 0 27 2 0 0 28 2 0 0>;
    194	};
    195};
    196
    197/include/ "pq3-etsec2-1.dtsi"
    198enet1: ethernet@b1000 {
    199	queue-group@b1000 {
    200		interrupts = <33 2 0 0 34 2 0 0 35 2 0 0>;
    201	};
    202};
    203
    204global-utilities@e0000 {
    205		compatible = "fsl,bsc9132-guts";
    206		reg = <0xe0000 0x1000>;
    207		fsl,has-rstcr;
    208	};
    209};