cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mpc8536si-post.dtsi (6521B)


      1/*
      2 * MPC8536 Silicon/SoC Device Tree Source (post include)
      3 *
      4 * Copyright 2011 Freescale Semiconductor Inc.
      5 *
      6 * Redistribution and use in source and binary forms, with or without
      7 * modification, are permitted provided that the following conditions are met:
      8 *     * Redistributions of source code must retain the above copyright
      9 *       notice, this list of conditions and the following disclaimer.
     10 *     * Redistributions in binary form must reproduce the above copyright
     11 *       notice, this list of conditions and the following disclaimer in the
     12 *       documentation and/or other materials provided with the distribution.
     13 *     * Neither the name of Freescale Semiconductor nor the
     14 *       names of its contributors may be used to endorse or promote products
     15 *       derived from this software without specific prior written permission.
     16 *
     17 *
     18 * ALTERNATIVELY, this software may be distributed under the terms of the
     19 * GNU General Public License ("GPL") as published by the Free Software
     20 * Foundation, either version 2 of that License or (at your option) any
     21 * later version.
     22 *
     23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
     24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
     27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
     30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
     32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     33 */
     34
     35&lbc {
     36	#address-cells = <2>;
     37	#size-cells = <1>;
     38	compatible = "fsl,mpc8536-elbc", "fsl,elbc", "simple-bus";
     39	interrupts = <19 2 0 0>;
     40};
     41
     42/* controller at 0x8000 */
     43&pci0 {
     44	compatible = "fsl,mpc8540-pci";
     45	device_type = "pci";
     46	interrupts = <24 0x2 0 0>;
     47	bus-range = <0 0xff>;
     48	#interrupt-cells = <1>;
     49	#size-cells = <2>;
     50	#address-cells = <3>;
     51};
     52
     53/* controller at 0x9000 */
     54&pci1 {
     55	compatible = "fsl,mpc8548-pcie";
     56	device_type = "pci";
     57	#size-cells = <2>;
     58	#address-cells = <3>;
     59	bus-range = <0 255>;
     60	clock-frequency = <33333333>;
     61	interrupts = <25 2 0 0>;
     62
     63	pcie@0 {
     64		reg = <0 0 0 0 0>;
     65		#interrupt-cells = <1>;
     66		#size-cells = <2>;
     67		#address-cells = <3>;
     68		device_type = "pci";
     69		interrupts = <25 2 0 0>;
     70		interrupt-map-mask = <0xf800 0 0 7>;
     71
     72		interrupt-map = <
     73			/* IDSEL 0x0 */
     74			0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
     75			0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
     76			0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
     77			0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
     78			>;
     79	};
     80};
     81
     82/* controller at 0xa000 */
     83&pci2 {
     84	compatible = "fsl,mpc8548-pcie";
     85	device_type = "pci";
     86	#size-cells = <2>;
     87	#address-cells = <3>;
     88	bus-range = <0 255>;
     89	clock-frequency = <33333333>;
     90	interrupts = <26 2 0 0>;
     91
     92	pcie@0 {
     93		reg = <0 0 0 0 0>;
     94		#interrupt-cells = <1>;
     95		#size-cells = <2>;
     96		#address-cells = <3>;
     97		device_type = "pci";
     98		interrupts = <26 2 0 0>;
     99		interrupt-map-mask = <0xf800 0 0 7>;
    100		interrupt-map = <
    101			/* IDSEL 0x0 */
    102			0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
    103			0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
    104			0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
    105			0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
    106			>;
    107	};
    108};
    109
    110/* controller at 0xb000 */
    111&pci3 {
    112	compatible = "fsl,mpc8548-pcie";
    113	device_type = "pci";
    114	#size-cells = <2>;
    115	#address-cells = <3>;
    116	bus-range = <0 255>;
    117	clock-frequency = <33333333>;
    118	interrupts = <27 2 0 0>;
    119
    120	pcie@0 {
    121		reg = <0 0 0 0 0>;
    122		#interrupt-cells = <1>;
    123		#size-cells = <2>;
    124		#address-cells = <3>;
    125		device_type = "pci";
    126		interrupts = <27 2 0 0>;
    127		interrupt-map-mask = <0xf800 0 0 7>;
    128		interrupt-map = <
    129			/* IDSEL 0x0 */
    130			0000 0x0 0x0 0x1 &mpic 0x8 0x1 0x0 0x0
    131			0000 0x0 0x0 0x2 &mpic 0x9 0x1 0x0 0x0
    132			0000 0x0 0x0 0x3 &mpic 0xa 0x1 0x0 0x0
    133			0000 0x0 0x0 0x4 &mpic 0xb 0x1 0x0 0x0
    134			>;
    135	};
    136};
    137&soc {
    138	#address-cells = <1>;
    139	#size-cells = <1>;
    140	device_type = "soc";
    141	compatible = "fsl,mpc8536-immr", "simple-bus";
    142	bus-frequency = <0>;		// Filled out by uboot.
    143
    144	ecm-law@0 {
    145		compatible = "fsl,ecm-law";
    146		reg = <0x0 0x1000>;
    147		fsl,num-laws = <12>;
    148	};
    149
    150	ecm@1000 {
    151		compatible = "fsl,mpc8536-ecm", "fsl,ecm";
    152		reg = <0x1000 0x1000>;
    153		interrupts = <17 2 0 0>;
    154	};
    155
    156	memory-controller@2000 {
    157		compatible = "fsl,mpc8536-memory-controller";
    158		reg = <0x2000 0x1000>;
    159		interrupts = <18 2 0 0>;
    160	};
    161
    162/include/ "pq3-i2c-0.dtsi"
    163/include/ "pq3-i2c-1.dtsi"
    164/include/ "pq3-duart-0.dtsi"
    165
    166/include/ "pq3-espi-0.dtsi"
    167	spi@7000 {
    168		fsl,espi-num-chipselects = <4>;
    169	};
    170
    171/include/ "pq3-gpio-0.dtsi"
    172
    173	/* mark compat w/8572 to get some erratum treatment */
    174	gpio-controller@f000 {
    175		compatible = "fsl,mpc8572-gpio";
    176	};
    177
    178	sata@18000 {
    179		compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
    180		reg = <0x18000 0x1000>;
    181		cell-index = <1>;
    182		interrupts = <74 0x2 0 0>;
    183	};
    184
    185	sata@19000 {
    186		compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
    187		reg = <0x19000 0x1000>;
    188		cell-index = <2>;
    189		interrupts = <41 0x2 0 0>;
    190	};
    191
    192	L2: l2-cache-controller@20000 {
    193		compatible = "fsl,mpc8536-l2-cache-controller";
    194		reg = <0x20000 0x1000>;
    195		cache-line-size = <32>;	// 32 bytes
    196		cache-size = <0x80000>; // L2, 512K
    197		interrupts = <16 2 0 0>;
    198	};
    199
    200/include/ "pq3-dma-0.dtsi"
    201/include/ "pq3-etsec1-0.dtsi"
    202/include/ "pq3-etsec1-timer-0.dtsi"
    203
    204	usb@22000 {
    205		compatible = "fsl-usb2-mph-v1.2", "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
    206		reg = <0x22000 0x1000>;
    207		#address-cells = <1>;
    208		#size-cells = <0>;
    209		interrupts = <28 0x2 0 0>;
    210	};
    211
    212	usb@23000 {
    213		compatible = "fsl-usb2-mph-v1.2", "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
    214		reg = <0x23000 0x1000>;
    215		#address-cells = <1>;
    216		#size-cells = <0>;
    217		interrupts = <46 0x2 0 0>;
    218	};
    219
    220	ptp_clock@24e00 {
    221		interrupts = <68 2 0 0 69 2 0 0 70 2 0 0 71 2 0 0>;
    222	};
    223
    224/include/ "pq3-etsec1-2.dtsi"
    225
    226	ethernet@26000 {
    227		cell-index = <1>;
    228	};
    229
    230	usb@2b000 {
    231		compatible = "fsl,mpc8536-usb2-dr", "fsl-usb2-dr";
    232		reg = <0x2b000 0x1000>;
    233		#address-cells = <1>;
    234		#size-cells = <0>;
    235		interrupts = <60 0x2 0 0>;
    236	};
    237
    238/include/ "pq3-esdhc-0.dtsi"
    239	sdhc@2e000 {
    240		compatible = "fsl,mpc8536-esdhc", "fsl,esdhc";
    241	};
    242
    243/include/ "pq3-sec3.0-0.dtsi"
    244/include/ "pq3-mpic.dtsi"
    245/include/ "pq3-mpic-timer-B.dtsi"
    246
    247	global-utilities@e0000 {
    248		compatible = "fsl,mpc8536-guts";
    249		reg = <0xe0000 0x1000>;
    250		fsl,has-rstcr;
    251	};
    252};