mpc8641si-post.dtsi (3109B)
1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * MPC8641 Silicon/SoC Device Tree Source (post include) 4 * 5 * Copyright 2016 Elettra-Sincrotrone Trieste S.C.p.A. 6 */ 7 8&lbc { 9 #address-cells = <2>; 10 #size-cells = <1>; 11 compatible = "fsl,mpc8641-localbus", "simple-bus"; 12 interrupts = <19 2 0 0>; 13}; 14 15&soc { 16 #address-cells = <1>; 17 #size-cells = <1>; 18 device_type = "soc"; 19 compatible = "fsl,mpc8641-soc", "simple-bus"; 20 bus-frequency = <0>; 21 22 mcm-law@0 { 23 compatible = "fsl,mcm-law"; 24 reg = <0x0 0x1000>; 25 fsl,num-laws = <10>; 26 }; 27 28 mcm@1000 { 29 compatible = "fsl,mpc8641-mcm", "fsl,mcm"; 30 reg = <0x1000 0x1000>; 31 interrupts = <17 2 0 0>; 32 }; 33 34/include/ "pq3-i2c-0.dtsi" 35/include/ "pq3-i2c-1.dtsi" 36/include/ "pq3-duart-0.dtsi" 37 serial@4600 { 38 interrupts = <28 2 0 0>; 39 }; 40/include/ "pq3-dma-0.dtsi" 41 dma@21300 { 42 compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma"; 43 }; 44 dma-channel@0 { 45 compatible = "fsl,mpc8641-dma-channel", "fsl,eloplus-dma-channel"; 46 }; 47 dma-channel@80 { 48 compatible = "fsl,mpc8641-dma-channel", "fsl,eloplus-dma-channel"; 49 }; 50 dma-channel@100 { 51 compatible = "fsl,mpc8641-dma-channel", "fsl,eloplus-dma-channel"; 52 }; 53 dma-channel@180 { 54 compatible = "fsl,mpc8641-dma-channel", "fsl,eloplus-dma-channel"; 55 }; 56 57/include/ "pq3-etsec1-0.dtsi" 58 ethernet@24000 { 59 model = "TSEC"; 60 }; 61/include/ "pq3-etsec1-1.dtsi" 62 ethernet@25000 { 63 model = "TSEC"; 64 }; 65/include/ "pq3-etsec1-2.dtsi" 66 ethernet@26000 { 67 model = "TSEC"; 68 }; 69/include/ "pq3-etsec1-3.dtsi" 70 ethernet@27000 { 71 model = "TSEC"; 72 }; 73 74/include/ "qoriq-mpic.dtsi" 75 msi@41600 { 76 compatible = "fsl,mpc8641-msi", "fsl,mpic-msi"; 77 }; 78 msi@41800 { 79 compatible = "fsl,mpc8641-msi", "fsl,mpic-msi"; 80 }; 81 msi@41a00 { 82 compatible = "fsl,mpc8641-msi", "fsl,mpic-msi"; 83 }; 84 85 global-utilities@e0000 { 86 compatible = "fsl,mpc8641-guts"; 87 reg = <0xe0000 0x1000>; 88 fsl,has-rstcr; 89 }; 90}; 91 92&pci0 { 93 compatible = "fsl,mpc8641-pcie"; 94 device_type = "pci"; 95 #interrupt-cells = <1>; 96 #size-cells = <2>; 97 #address-cells = <3>; 98 bus-range = <0x0 0xff>; 99 clock-frequency = <100000000>; 100 interrupts = <24 2 0 0>; 101 102 pcie@0 { 103 reg = <0 0 0 0 0>; 104 #interrupt-cells = <1>; 105 #size-cells = <2>; 106 #address-cells = <3>; 107 device_type = "pci"; 108 interrupts = <24 2 0 0>; 109 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 110 interrupt-map = < 111 0x0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0 112 0x0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0 113 0x0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0 114 0x0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0 115 >; 116 }; 117}; 118 119&pci1 { 120 compatible = "fsl,mpc8641-pcie"; 121 device_type = "pci"; 122 #interrupt-cells = <1>; 123 #size-cells = <2>; 124 #address-cells = <3>; 125 bus-range = <0x0 0xff>; 126 clock-frequency = <100000000>; 127 interrupts = <25 2 0 0>; 128 129 pcie@0 { 130 reg = <0 0 0 0 0>; 131 #interrupt-cells = <1>; 132 #size-cells = <2>; 133 #address-cells = <3>; 134 device_type = "pci"; 135 interrupts = <25 2 0 0>; 136 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 137 interrupt-map = < 138 0x0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0 139 0x0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0 140 0x0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0 141 0x0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0 142 >; 143 }; 144};