cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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p1010rdb.dtsi (5550B)


      1/*
      2 * P1010 RDB Device Tree Source stub (no addresses or top-level ranges)
      3 *
      4 * Copyright 2011 Freescale Semiconductor Inc.
      5 *
      6 * Redistribution and use in source and binary forms, with or without
      7 * modification, are permitted provided that the following conditions are met:
      8 *     * Redistributions of source code must retain the above copyright
      9 *       notice, this list of conditions and the following disclaimer.
     10 *     * Redistributions in binary form must reproduce the above copyright
     11 *       notice, this list of conditions and the following disclaimer in the
     12 *       documentation and/or other materials provided with the distribution.
     13 *     * Neither the name of Freescale Semiconductor nor the
     14 *       names of its contributors may be used to endorse or promote products
     15 *       derived from this software without specific prior written permission.
     16 *
     17 *
     18 * ALTERNATIVELY, this software may be distributed under the terms of the
     19 * GNU General Public License ("GPL") as published by the Free Software
     20 * Foundation, either version 2 of that License or (at your option) any
     21 * later version.
     22 *
     23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
     24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
     27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
     30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
     32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     33 */
     34
     35&board_ifc {
     36	nor@0,0 {
     37		#address-cells = <1>;
     38		#size-cells = <1>;
     39		compatible = "cfi-flash";
     40		reg = <0x0 0x0 0x2000000>;
     41		bank-width = <2>;
     42		device-width = <1>;
     43
     44		partition@40000 {
     45			/* 256KB for DTB Image */
     46			reg = <0x00040000 0x00040000>;
     47			label = "NOR DTB Image";
     48		};
     49
     50		partition@80000 {
     51			/* 7 MB for Linux Kernel Image */
     52			reg = <0x00080000 0x00700000>;
     53			label = "NOR Linux Kernel Image";
     54		};
     55
     56		partition@800000 {
     57			/* 20MB for JFFS2 based Root file System */
     58			reg = <0x00800000 0x01400000>;
     59			label = "NOR JFFS2 Root File System";
     60		};
     61
     62		partition@1f00000 {
     63			/* This location must not be altered  */
     64			/* 512KB for u-boot Bootloader Image */
     65			/* 512KB for u-boot Environment Variables */
     66			reg = <0x01f00000 0x00100000>;
     67			label = "NOR U-Boot Image";
     68			read-only;
     69		};
     70	};
     71
     72	ifc_nand: nand@1,0 {
     73		#address-cells = <1>;
     74		#size-cells = <1>;
     75		compatible = "fsl,ifc-nand";
     76		reg = <0x1 0x0 0x10000>;
     77	};
     78
     79	cpld@3,0 {
     80		#address-cells = <1>;
     81		#size-cells = <1>;
     82		compatible = "fsl,p1010rdb-cpld";
     83		reg = <0x3 0x0 0x0000020>;
     84		bank-width = <1>;
     85		device-width = <1>;
     86	};
     87};
     88
     89&board_soc {
     90	i2c@3000 {
     91		eeprom@50 {
     92			compatible = "st,24c256", "atmel,24c256";
     93			reg = <0x50>;
     94		};
     95
     96		rtc@68 {
     97			compatible = "pericom,pt7c4338";
     98			reg = <0x68>;
     99		};
    100	};
    101
    102	i2c@3100 {
    103		eeprom@52 {
    104			compatible = "atmel,24c01";
    105			reg = <0x52>;
    106		};
    107	};
    108
    109	spi@7000 {
    110		flash@0 {
    111			#address-cells = <1>;
    112			#size-cells = <1>;
    113			compatible = "spansion,s25sl12801", "jedec,spi-nor";
    114			reg = <0>;
    115			spi-max-frequency = <40000000>;
    116
    117			partition@0 {
    118				/* 1MB for u-boot Bootloader Image */
    119				/* 1MB for Environment */
    120				reg = <0x0 0x00100000>;
    121				label = "SPI Flash U-Boot Image";
    122				read-only;
    123			};
    124
    125			partition@100000 {
    126				/* 512KB for DTB Image */
    127				reg = <0x00100000 0x00080000>;
    128				label = "SPI Flash DTB Image";
    129			};
    130
    131			partition@180000 {
    132				/* 4MB for Linux Kernel Image */
    133				reg = <0x00180000 0x00400000>;
    134				label = "SPI Flash Linux Kernel Image";
    135			};
    136
    137			partition@580000 {
    138				/* 4MB for Compressed RFS Image */
    139				reg = <0x00580000 0x00400000>;
    140				label = "SPI Flash Compressed RFSImage";
    141			};
    142
    143			partition@980000 {
    144				/* 6.5MB for JFFS2 based RFS */
    145				reg = <0x00980000 0x00680000>;
    146				label = "SPI Flash JFFS2 RFS";
    147			};
    148		};
    149	};
    150
    151	usb@22000 {
    152		phy_type = "utmi";
    153		dr_mode = "host";
    154	};
    155
    156	mdio@24000 {
    157		phy0: ethernet-phy@0 {
    158			reg = <0x1>;
    159		};
    160
    161		phy1: ethernet-phy@1 {
    162			reg = <0x0>;
    163		};
    164
    165		phy2: ethernet-phy@2 {
    166			reg = <0x2>;
    167		};
    168
    169		tbi-phy@3 {
    170			device_type = "tbi-phy";
    171			reg = <0x3>;
    172		};
    173	};
    174
    175	mdio@25000 {
    176		tbi0: tbi-phy@11 {
    177			reg = <0x11>;
    178			device_type = "tbi-phy";
    179		};
    180	};
    181
    182	mdio@26000 {
    183		tbi1: tbi-phy@11 {
    184			reg = <0x11>;
    185			device_type = "tbi-phy";
    186		};
    187	};
    188
    189	ptp_clock@b0e00 {
    190		compatible = "fsl,etsec-ptp";
    191		reg = <0xb0e00 0xb0>;
    192		interrupts = <68 2 0 0 69 2 0 0>;
    193		fsl,tclk-period	= <10>;
    194		fsl,tmr-prsc	= <2>;
    195		fsl,tmr-add	= <0x80000016>;
    196		fsl,tmr-fiper1	= <999999990>;
    197		fsl,tmr-fiper2	= <99990>;
    198		fsl,max-adj	= <199999999>;
    199	};
    200
    201	enet0: ethernet@b0000 {
    202		phy-handle = <&phy0>;
    203		phy-connection-type = "rgmii-id";
    204	};
    205
    206	enet1: ethernet@b1000 {
    207		phy-handle = <&phy1>;
    208		tbi-handle = <&tbi0>;
    209		phy-connection-type = "sgmii";
    210	};
    211
    212	enet2: ethernet@b2000 {
    213		phy-handle = <&phy2>;
    214		tbi-handle = <&tbi1>;
    215		phy-connection-type = "sgmii";
    216	};
    217};
    218
    219&pci0 {
    220	pcie@0 {
    221		interrupt-map = <
    222			/* IDSEL 0x0 */
    223			/*
    224			 *irq[4:5] are active-high
    225			 *irq[6:7] are active-low
    226			 */
    227			0000 0x0 0x0 0x1 &mpic 0x4 0x2 0x0 0x0
    228			0000 0x0 0x0 0x2 &mpic 0x5 0x2 0x0 0x0
    229			0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
    230			0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
    231			>;
    232	};
    233};