cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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p1021si-pre.dtsi (2424B)

      1/*
      2 * P1021/P1012 Silicon/SoC Device Tree Source (pre include)
      3 *
      4 * Copyright 2011 Freescale Semiconductor Inc.
      5 *
      6 * Redistribution and use in source and binary forms, with or without
      7 * modification, are permitted provided that the following conditions are met:
      8 *     * Redistributions of source code must retain the above copyright
      9 *       notice, this list of conditions and the following disclaimer.
     10 *     * Redistributions in binary form must reproduce the above copyright
     11 *       notice, this list of conditions and the following disclaimer in the
     12 *       documentation and/or other materials provided with the distribution.
     13 *     * Neither the name of Freescale Semiconductor nor the
     14 *       names of its contributors may be used to endorse or promote products
     15 *       derived from this software without specific prior written permission.
     16 *
     17 *
     18 * ALTERNATIVELY, this software may be distributed under the terms of the
     19 * GNU General Public License ("GPL") as published by the Free Software
     20 * Foundation, either version 2 of that License or (at your option) any
     21 * later version.
     22 *
     23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
     24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
     27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
     30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
     32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     33 */
     34
     35/dts-v1/;
     36
     37/include/ "e500v2_power_isa.dtsi"
     38
     39/ {
     40	compatible = "fsl,P1021";
     41	#address-cells = <2>;
     42	#size-cells = <2>;
     43	interrupt-parent = <&mpic>;
     44
     45	aliases {
     46		serial0 = &serial0;
     47		serial1 = &serial1;
     48		ethernet0 = &enet0;
     49		ethernet1 = &enet1;
     50		ethernet2 = &enet2;
     51		pci0 = &pci0;
     52		pci1 = &pci1;
     53	};
     54
     55	cpus {
     56		#address-cells = <1>;
     57		#size-cells = <0>;
     58
     59		PowerPC,P1021@0 {
     60			device_type = "cpu";
     61			reg = <0x0>;
     62			next-level-cache = <&L2>;
     63		};
     64
     65		PowerPC,P1021@1 {
     66			device_type = "cpu";
     67			reg = <0x1>;
     68			next-level-cache = <&L2>;
     69		};
     70	};
     71};