cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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p2041si-post.dtsi (11063B)


      1/*
      2 * P2041/P2040 Silicon/SoC Device Tree Source (post include)
      3 *
      4 * Copyright 2011 - 2015 Freescale Semiconductor Inc.
      5 *
      6 * Redistribution and use in source and binary forms, with or without
      7 * modification, are permitted provided that the following conditions are met:
      8 *     * Redistributions of source code must retain the above copyright
      9 *       notice, this list of conditions and the following disclaimer.
     10 *     * Redistributions in binary form must reproduce the above copyright
     11 *       notice, this list of conditions and the following disclaimer in the
     12 *       documentation and/or other materials provided with the distribution.
     13 *     * Neither the name of Freescale Semiconductor nor the
     14 *       names of its contributors may be used to endorse or promote products
     15 *       derived from this software without specific prior written permission.
     16 *
     17 *
     18 * ALTERNATIVELY, this software may be distributed under the terms of the
     19 * GNU General Public License ("GPL") as published by the Free Software
     20 * Foundation, either version 2 of that License or (at your option) any
     21 * later version.
     22 *
     23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
     24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
     27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
     30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
     32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     33 */
     34
     35&bman_fbpr {
     36	compatible = "fsl,bman-fbpr";
     37	alloc-ranges = <0 0 0x10 0>;
     38};
     39
     40&qman_fqd {
     41	compatible = "fsl,qman-fqd";
     42	alloc-ranges = <0 0 0x10 0>;
     43};
     44
     45&qman_pfdr {
     46	compatible = "fsl,qman-pfdr";
     47	alloc-ranges = <0 0 0x10 0>;
     48};
     49
     50&lbc {
     51	compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus";
     52	interrupts = <25 2 0 0>;
     53	#address-cells = <2>;
     54	#size-cells = <1>;
     55};
     56
     57/* controller at 0x200000 */
     58&pci0 {
     59	compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
     60	device_type = "pci";
     61	#size-cells = <2>;
     62	#address-cells = <3>;
     63	bus-range = <0x0 0xff>;
     64	clock-frequency = <33333333>;
     65	interrupts = <16 2 1 15>;
     66	fsl,iommu-parent = <&pamu0>;
     67	fsl,liodn-reg = <&guts 0x500>; /* PEX1LIODNR */
     68	pcie@0 {
     69		reg = <0 0 0 0 0>;
     70		#interrupt-cells = <1>;
     71		#size-cells = <2>;
     72		#address-cells = <3>;
     73		device_type = "pci";
     74		interrupts = <16 2 1 15>;
     75		interrupt-map-mask = <0xf800 0 0 7>;
     76		interrupt-map = <
     77			/* IDSEL 0x0 */
     78			0000 0 0 1 &mpic 40 1 0 0
     79			0000 0 0 2 &mpic 1 1 0 0
     80			0000 0 0 3 &mpic 2 1 0 0
     81			0000 0 0 4 &mpic 3 1 0 0
     82			>;
     83	};
     84};
     85
     86/* controller at 0x201000 */
     87&pci1 {
     88	compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
     89	device_type = "pci";
     90	#size-cells = <2>;
     91	#address-cells = <3>;
     92	bus-range = <0 0xff>;
     93	clock-frequency = <33333333>;
     94	interrupts = <16 2 1 14>;
     95	fsl,iommu-parent = <&pamu0>;
     96	fsl,liodn-reg = <&guts 0x504>; /* PEX2LIODNR */
     97	pcie@0 {
     98		reg = <0 0 0 0 0>;
     99		#interrupt-cells = <1>;
    100		#size-cells = <2>;
    101		#address-cells = <3>;
    102		device_type = "pci";
    103		interrupts = <16 2 1 14>;
    104		interrupt-map-mask = <0xf800 0 0 7>;
    105		interrupt-map = <
    106			/* IDSEL 0x0 */
    107			0000 0 0 1 &mpic 41 1 0 0
    108			0000 0 0 2 &mpic 5 1 0 0
    109			0000 0 0 3 &mpic 6 1 0 0
    110			0000 0 0 4 &mpic 7 1 0 0
    111			>;
    112	};
    113};
    114
    115/* controller at 0x202000 */
    116&pci2 {
    117	compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
    118	device_type = "pci";
    119	#size-cells = <2>;
    120	#address-cells = <3>;
    121	bus-range = <0x0 0xff>;
    122	clock-frequency = <33333333>;
    123	interrupts = <16 2 1 13>;
    124	fsl,iommu-parent = <&pamu0>;
    125	fsl,liodn-reg = <&guts 0x508>; /* PEX3LIODNR */
    126	pcie@0 {
    127		reg = <0 0 0 0 0>;
    128		#interrupt-cells = <1>;
    129		#size-cells = <2>;
    130		#address-cells = <3>;
    131		device_type = "pci";
    132		interrupts = <16 2 1 13>;
    133		interrupt-map-mask = <0xf800 0 0 7>;
    134		interrupt-map = <
    135			/* IDSEL 0x0 */
    136			0000 0 0 1 &mpic 42 1 0 0
    137			0000 0 0 2 &mpic 9 1 0 0
    138			0000 0 0 3 &mpic 10 1 0 0
    139			0000 0 0 4 &mpic 11 1 0 0
    140			>;
    141	};
    142};
    143
    144&rio {
    145	compatible = "fsl,srio";
    146	interrupts = <16 2 1 11>;
    147	#address-cells = <2>;
    148	#size-cells = <2>;
    149	fsl,iommu-parent = <&pamu0>;
    150	ranges;
    151
    152	port1 {
    153		#address-cells = <2>;
    154		#size-cells = <2>;
    155		cell-index = <1>;
    156		fsl,liodn-reg = <&guts 0x510>; /* RIO1LIODNR */
    157	};
    158
    159	port2 {
    160		#address-cells = <2>;
    161		#size-cells = <2>;
    162		cell-index = <2>;
    163		fsl,liodn-reg = <&guts 0x514>; /* RIO2LIODNR */
    164	};
    165};
    166
    167&dcsr {
    168	#address-cells = <1>;
    169	#size-cells = <1>;
    170	compatible = "fsl,dcsr", "simple-bus";
    171
    172	dcsr-epu@0 {
    173		compatible = "fsl,p2041-dcsr-epu", "fsl,dcsr-epu";
    174		interrupts = <52 2 0 0
    175			      84 2 0 0
    176			      85 2 0 0>;
    177		reg = <0x0 0x1000>;
    178	};
    179	dcsr-npc {
    180		compatible = "fsl,dcsr-npc";
    181		reg = <0x1000 0x1000 0x1000000 0x8000>;
    182	};
    183	dcsr-nxc@2000 {
    184		compatible = "fsl,dcsr-nxc";
    185		reg = <0x2000 0x1000>;
    186	};
    187	dcsr-corenet {
    188		compatible = "fsl,dcsr-corenet";
    189		reg = <0x8000 0x1000 0xB0000 0x1000>;
    190	};
    191	dcsr-dpaa@9000 {
    192		compatible = "fsl,p2041-dcsr-dpaa", "fsl,dcsr-dpaa";
    193		reg = <0x9000 0x1000>;
    194	};
    195	dcsr-ocn@11000 {
    196		compatible = "fsl,p2041-dcsr-ocn", "fsl,dcsr-ocn";
    197		reg = <0x11000 0x1000>;
    198	};
    199	dcsr-ddr@12000 {
    200		compatible = "fsl,dcsr-ddr";
    201		dev-handle = <&ddr1>;
    202		reg = <0x12000 0x1000>;
    203	};
    204	dcsr-nal@18000 {
    205		compatible = "fsl,p2041-dcsr-nal", "fsl,dcsr-nal";
    206		reg = <0x18000 0x1000>;
    207	};
    208	dcsr-rcpm@22000 {
    209		compatible = "fsl,p2041-dcsr-rcpm", "fsl,dcsr-rcpm";
    210		reg = <0x22000 0x1000>;
    211	};
    212	dcsr-cpu-sb-proxy@40000 {
    213		compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
    214		cpu-handle = <&cpu0>;
    215		reg = <0x40000 0x1000>;
    216	};
    217	dcsr-cpu-sb-proxy@41000 {
    218		compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
    219		cpu-handle = <&cpu1>;
    220		reg = <0x41000 0x1000>;
    221	};
    222	dcsr-cpu-sb-proxy@42000 {
    223		compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
    224		cpu-handle = <&cpu2>;
    225		reg = <0x42000 0x1000>;
    226	};
    227	dcsr-cpu-sb-proxy@43000 {
    228		compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
    229		cpu-handle = <&cpu3>;
    230		reg = <0x43000 0x1000>;
    231	};
    232};
    233
    234/include/ "qoriq-bman1-portals.dtsi"
    235
    236/include/ "qoriq-qman1-portals.dtsi"
    237
    238&soc {
    239	#address-cells = <1>;
    240	#size-cells = <1>;
    241	device_type = "soc";
    242	compatible = "simple-bus";
    243
    244	soc-sram-error {
    245		compatible = "fsl,soc-sram-error";
    246		interrupts = <16 2 1 29>;
    247	};
    248
    249	corenet-law@0 {
    250		compatible = "fsl,corenet-law";
    251		reg = <0x0 0x1000>;
    252		fsl,num-laws = <32>;
    253	};
    254
    255	ddr1: memory-controller@8000 {
    256		compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
    257		reg = <0x8000 0x1000>;
    258		interrupts = <16 2 1 23>;
    259	};
    260
    261	cpc: l3-cache-controller@10000 {
    262		compatible = "fsl,p2041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
    263		reg = <0x10000 0x1000>;
    264		interrupts = <16 2 1 27>;
    265	};
    266
    267	corenet-cf@18000 {
    268		compatible = "fsl,corenet1-cf", "fsl,corenet-cf";
    269		reg = <0x18000 0x1000>;
    270		interrupts = <16 2 1 31>;
    271		fsl,ccf-num-csdids = <32>;
    272		fsl,ccf-num-snoopids = <32>;
    273	};
    274
    275	iommu@20000 {
    276		compatible = "fsl,pamu-v1.0", "fsl,pamu";
    277		reg = <0x20000 0x4000>; /* for compatibility with older PAMU drivers */
    278		ranges = <0 0x20000 0x4000>;
    279		#address-cells = <1>;
    280		#size-cells = <1>;
    281		interrupts = <
    282			24 2 0 0
    283			16 2 1 30>;
    284		fsl,portid-mapping = <0x0f000000>;
    285
    286		pamu0: pamu@0 {
    287			reg = <0 0x1000>;
    288			fsl,primary-cache-geometry = <32 1>;
    289			fsl,secondary-cache-geometry = <128 2>;
    290		};
    291
    292		pamu1: pamu@1000 {
    293			reg = <0x1000 0x1000>;
    294			fsl,primary-cache-geometry = <32 1>;
    295			fsl,secondary-cache-geometry = <128 2>;
    296		};
    297
    298		pamu2: pamu@2000 {
    299			reg = <0x2000 0x1000>;
    300			fsl,primary-cache-geometry = <32 1>;
    301			fsl,secondary-cache-geometry = <128 2>;
    302		};
    303
    304		pamu3: pamu@3000 {
    305			reg = <0x3000 0x1000>;
    306			fsl,primary-cache-geometry = <32 1>;
    307			fsl,secondary-cache-geometry = <128 2>;
    308		};
    309	};
    310
    311/include/ "qoriq-mpic.dtsi"
    312
    313	guts: global-utilities@e0000 {
    314		compatible = "fsl,qoriq-device-config-1.0";
    315		reg = <0xe0000 0xe00>;
    316		fsl,has-rstcr;
    317		#sleep-cells = <1>;
    318		fsl,liodn-bits = <12>;
    319	};
    320
    321	pins: global-utilities@e0e00 {
    322		compatible = "fsl,qoriq-pin-control-1.0";
    323		reg = <0xe0e00 0x200>;
    324		#sleep-cells = <2>;
    325	};
    326
    327/include/ "qoriq-clockgen1.dtsi"
    328	global-utilities@e1000 {
    329		compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0";
    330	};
    331
    332	rcpm: global-utilities@e2000 {
    333		compatible = "fsl,qoriq-rcpm-1.0";
    334		reg = <0xe2000 0x1000>;
    335		#sleep-cells = <1>;
    336	};
    337
    338	sfp: sfp@e8000 {
    339		compatible = "fsl,p2041-sfp", "fsl,qoriq-sfp-1.0";
    340		reg	   = <0xe8000 0x1000>;
    341	};
    342
    343	serdes: serdes@ea000 {
    344		compatible = "fsl,p2041-serdes";
    345		reg	   = <0xea000 0x1000>;
    346	};
    347
    348/include/ "qoriq-dma-0.dtsi"
    349	dma@100300 {
    350		fsl,iommu-parent = <&pamu0>;
    351		fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */
    352	};
    353
    354/include/ "qoriq-dma-1.dtsi"
    355	dma@101300 {
    356		fsl,iommu-parent = <&pamu0>;
    357		fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */
    358	};
    359
    360/include/ "qoriq-espi-0.dtsi"
    361	spi@110000 {
    362		fsl,espi-num-chipselects = <4>;
    363	};
    364
    365/include/ "qoriq-esdhc-0.dtsi"
    366	sdhc@114000 {
    367		compatible = "fsl,p2041-esdhc", "fsl,esdhc";
    368		fsl,iommu-parent = <&pamu1>;
    369		fsl,liodn-reg = <&guts 0x530>; /* eSDHCLIODNR */
    370		sdhci,auto-cmd12;
    371	};
    372
    373/include/ "qoriq-i2c-0.dtsi"
    374	i2c@118000 {
    375		fsl,i2c-erratum-a004447;
    376	};
    377
    378	i2c@118100 {
    379		fsl,i2c-erratum-a004447;
    380	};
    381
    382/include/ "qoriq-i2c-1.dtsi"
    383	i2c@119000 {
    384		fsl,i2c-erratum-a004447;
    385	};
    386
    387	i2c@119100 {
    388		fsl,i2c-erratum-a004447;
    389	};
    390
    391/include/ "qoriq-duart-0.dtsi"
    392/include/ "qoriq-duart-1.dtsi"
    393/include/ "qoriq-gpio-0.dtsi"
    394/include/ "qoriq-usb2-mph-0.dtsi"
    395	usb0: usb@210000 {
    396		compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
    397		phy_type = "utmi";
    398		fsl,iommu-parent = <&pamu1>;
    399		fsl,liodn-reg = <&guts 0x520>; /* USB1LIODNR */
    400		port0;
    401	};
    402
    403/include/ "qoriq-usb2-dr-0.dtsi"
    404	usb1: usb@211000 {
    405		compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
    406		fsl,iommu-parent = <&pamu1>;
    407		fsl,liodn-reg = <&guts 0x524>; /* USB2LIODNR */
    408		dr_mode = "host";
    409		phy_type = "utmi";
    410	};
    411
    412/include/ "qoriq-sata2-0.dtsi"
    413	sata@220000 {
    414		fsl,iommu-parent = <&pamu1>;
    415		fsl,liodn-reg = <&guts 0x550>; /* SATA1LIODNR */
    416	};
    417
    418/include/ "qoriq-sata2-1.dtsi"
    419	sata@221000 {
    420		fsl,iommu-parent = <&pamu1>;
    421		fsl,liodn-reg = <&guts 0x554>; /* SATA2LIODNR */
    422	};
    423
    424/include/ "qoriq-sec4.2-0.dtsi"
    425crypto: crypto@300000 {
    426		fsl,iommu-parent = <&pamu1>;
    427	};
    428
    429/include/ "qoriq-qman1.dtsi"
    430/include/ "qoriq-bman1.dtsi"
    431
    432/include/ "qoriq-fman-0.dtsi"
    433/include/ "qoriq-fman-0-1g-0.dtsi"
    434/include/ "qoriq-fman-0-1g-1.dtsi"
    435/include/ "qoriq-fman-0-1g-2.dtsi"
    436/include/ "qoriq-fman-0-1g-3.dtsi"
    437/include/ "qoriq-fman-0-1g-4.dtsi"
    438/include/ "qoriq-fman-0-10g-0.dtsi"
    439	fman@400000 {
    440		enet0: ethernet@e0000 {
    441		};
    442
    443		enet1: ethernet@e2000 {
    444		};
    445
    446		enet2: ethernet@e4000 {
    447		};
    448
    449		enet3: ethernet@e6000 {
    450		};
    451
    452		enet4: ethernet@e8000 {
    453		};
    454
    455		enet5: ethernet@f0000 {
    456		};
    457	};
    458};