cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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t1023rdb.dts (5768B)


      1/*
      2 * T1023 RDB Device Tree Source
      3 *
      4 * Copyright 2014 Freescale Semiconductor Inc.
      5 *
      6 * Redistribution and use in source and binary forms, with or without
      7 * modification, are permitted provided that the following conditions are met:
      8 *     * Redistributions of source code must retain the above copyright
      9 *	 notice, this list of conditions and the following disclaimer.
     10 *     * Redistributions in binary form must reproduce the above copyright
     11 *	 notice, this list of conditions and the following disclaimer in the
     12 *	 documentation and/or other materials provided with the distribution.
     13 *     * Neither the name of Freescale Semiconductor nor the
     14 *	 names of its contributors may be used to endorse or promote products
     15 *	 derived from this software without specific prior written permission.
     16 *
     17 *
     18 * ALTERNATIVELY, this software may be distributed under the terms of the
     19 * GNU General Public License ("GPL") as published by the Free Software
     20 * Foundation, either version 2 of that License or (at your option) any
     21 * later version.
     22 *
     23 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
     24 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
     25 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
     26 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
     27 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
     28 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     29 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
     30 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
     32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     33 */
     34
     35/include/ "t102xsi-pre.dtsi"
     36
     37/ {
     38	model = "fsl,T1023RDB";
     39	compatible = "fsl,T1023RDB";
     40	#address-cells = <2>;
     41	#size-cells = <2>;
     42	interrupt-parent = <&mpic>;
     43
     44	reserved-memory {
     45		#address-cells = <2>;
     46		#size-cells = <2>;
     47		ranges;
     48
     49		bman_fbpr: bman-fbpr {
     50			size = <0 0x1000000>;
     51			alignment = <0 0x1000000>;
     52		};
     53
     54		qman_fqd: qman-fqd {
     55			size = <0 0x400000>;
     56			alignment = <0 0x400000>;
     57		};
     58
     59		qman_pfdr: qman-pfdr {
     60			size = <0 0x2000000>;
     61			alignment = <0 0x2000000>;
     62		};
     63	};
     64
     65	ifc: localbus@ffe124000 {
     66		reg = <0xf 0xfe124000 0 0x2000>;
     67		ranges = <0 0 0xf 0xe8000000 0x08000000
     68			  1 0 0xf 0xff800000 0x00010000>;
     69
     70		nor@0,0 {
     71			#address-cells = <1>;
     72			#size-cells = <1>;
     73			status = "disabled";
     74			compatible = "cfi-flash";
     75			reg = <0x0 0x0 0x8000000>;
     76			bank-width = <2>;
     77			device-width = <1>;
     78		};
     79
     80		nand@1,0 {
     81			#address-cells = <1>;
     82			#size-cells = <1>;
     83			compatible = "fsl,ifc-nand";
     84			reg = <0x1 0x0 0x10000>;
     85		};
     86	};
     87
     88	memory {
     89		device_type = "memory";
     90	};
     91
     92	dcsr: dcsr@f00000000 {
     93		ranges = <0x00000000 0xf 0x00000000 0x01072000>;
     94	};
     95
     96	bportals: bman-portals@ff4000000 {
     97		ranges = <0x0 0xf 0xf4000000 0x2000000>;
     98	};
     99
    100	qportals: qman-portals@ff6000000 {
    101		ranges = <0x0 0xf 0xf6000000 0x2000000>;
    102	};
    103
    104	soc: soc@ffe000000 {
    105		ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
    106		reg = <0xf 0xfe000000 0 0x00001000>;
    107		spi@110000 {
    108			flash@0 {
    109				#address-cells = <1>;
    110				#size-cells = <1>;
    111				compatible = "spansion,s25fl512s", "jedec,spi-nor";
    112				reg = <0>;
    113				spi-max-frequency = <10000000>; /* input clk */
    114			};
    115		};
    116
    117		i2c@118000 {
    118			eeprom@50 {
    119				compatible = "st,m24256";
    120				reg = <0x50>;
    121			};
    122
    123			rtc@68 {
    124				compatible = "dallas,ds1339";
    125				reg = <0x68>;
    126				interrupts = <0x5 0x1 0 0>;
    127			};
    128		};
    129
    130		i2c@118100 {
    131			current-sensor@40 {
    132				compatible = "ti,ina220";
    133				reg = <0x40>;
    134				shunt-resistor = <1000>;
    135			};
    136
    137			current-sensor@41 {
    138				compatible = "ti,ina220";
    139				reg = <0x41>;
    140				shunt-resistor = <1000>;
    141			};
    142		};
    143
    144		fman@400000 {
    145			fm1mac1: ethernet@e0000 {
    146				phy-handle = <&sgmii_rtk_phy2>;
    147				phy-connection-type = "sgmii";
    148				sleep = <&rcpm 0x80000000>;
    149			};
    150
    151			fm1mac2: ethernet@e2000 {
    152				sleep = <&rcpm 0x40000000>;
    153			};
    154
    155			fm1mac3: ethernet@e4000 {
    156				phy-handle = <&sgmii_aqr_phy3>;
    157				phy-connection-type = "2500base-x";
    158				sleep = <&rcpm 0x20000000>;
    159			};
    160
    161			fm1mac4: ethernet@e6000 {
    162				phy-handle = <&rgmii_rtk_phy1>;
    163				phy-connection-type = "rgmii";
    164				sleep = <&rcpm 0x10000000>;
    165			};
    166
    167
    168			mdio0: mdio@fc000 {
    169				rgmii_rtk_phy1: ethernet-phy@1 {
    170					reg = <0x1>;
    171				};
    172				sgmii_rtk_phy2: ethernet-phy@3 {
    173					reg = <0x3>;
    174				};
    175			};
    176
    177			xmdio0: mdio@fd000 {
    178				sgmii_aqr_phy3: ethernet-phy@2 {
    179					compatible = "ethernet-phy-ieee802.3-c45";
    180					reg = <0x2>;
    181				};
    182			};
    183		};
    184	};
    185
    186	pci0: pcie@ffe240000 {
    187		reg = <0xf 0xfe240000 0 0x10000>;
    188		ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0 0x10000000
    189			  0x01000000 0 0x00000000 0xf 0xf8000000 0 0x00010000>;
    190		pcie@0 {
    191			ranges = <0x02000000 0 0xe0000000
    192				  0x02000000 0 0xe0000000
    193				  0 0x10000000
    194
    195				  0x01000000 0 0x00000000
    196				  0x01000000 0 0x00000000
    197				  0 0x00010000>;
    198		};
    199	};
    200
    201	pci1: pcie@ffe250000 {
    202		reg = <0xf 0xfe250000 0 0x10000>;
    203		ranges = <0x02000000 0 0xe0000000 0xc 0x10000000 0 0x10000000
    204			  0x01000000 0 0x00000000 0xf 0xf8010000 0 0x00010000>;
    205		pcie@0 {
    206			ranges = <0x02000000 0 0xe0000000
    207				  0x02000000 0 0xe0000000
    208				  0 0x10000000
    209
    210				  0x01000000 0 0x00000000
    211				  0x01000000 0 0x00000000
    212				  0 0x00010000>;
    213		};
    214	};
    215
    216	pci2: pcie@ffe260000 {
    217		reg = <0xf 0xfe260000 0 0x10000>;
    218		ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x10000000
    219			  0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
    220		pcie@0 {
    221			ranges = <0x02000000 0 0xe0000000
    222				  0x02000000 0 0xe0000000
    223				  0 0x10000000
    224
    225				  0x01000000 0 0x00000000
    226				  0x01000000 0 0x00000000
    227				  0 0x00010000>;
    228		};
    229	};
    230};
    231
    232#include "t1023si-post.dtsi"