cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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kuroboxHD.dts (3763B)


      1/*
      2 * Device Tree Souce for Buffalo KuroboxHD
      3 *
      4 * Choose CONFIG_LINKSTATION to build a kernel for KuroboxHD, or use
      5 * the default configuration linkstation_defconfig.
      6 *
      7 * Based on sandpoint.dts
      8 *
      9 * 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de>
     10 * Copyright 2008 Freescale Semiconductor, Inc.
     11 *
     12 * This file is licensed under
     13 * the terms of the GNU General Public License version 2.  This program
     14 * is licensed "as is" without any warranty of any kind, whether express
     15 * or implied.
     16
     17XXXX add flash parts, rtc, ??
     18
     19 */
     20
     21/dts-v1/;
     22
     23/ {
     24	model = "KuroboxHD";
     25	compatible = "linkstation";
     26	#address-cells = <1>;
     27	#size-cells = <1>;
     28
     29	aliases {
     30		serial0 = &serial0;
     31		serial1 = &serial1;
     32		pci0 = &pci0;
     33	};
     34
     35	cpus {
     36		#address-cells = <1>;
     37		#size-cells = <0>;
     38
     39		PowerPC,603e { /* Really 8241 */
     40			device_type = "cpu";
     41			reg = <0x0>;
     42			clock-frequency = <200000000>;	/* Fixed by bootloader */
     43			timebase-frequency = <24391680>; /* Fixed by bootloader */
     44			bus-frequency = <0>;		/* Fixed by bootloader */
     45			/* Following required by dtc but not used */
     46			i-cache-size = <0x4000>;
     47			d-cache-size = <0x4000>;
     48		};
     49	};
     50
     51	memory {
     52		device_type = "memory";
     53		reg = <0x0 0x4000000>;
     54	};
     55
     56	soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
     57		#address-cells = <1>;
     58		#size-cells = <1>;
     59		device_type = "soc";
     60		compatible = "mpc10x";
     61		store-gathering = <0>; /* 0 == off, !0 == on */
     62		reg = <0x80000000 0x100000>;
     63		ranges = <0x80000000 0x80000000 0x70000000	/* pci mem space */
     64			  0xfc000000 0xfc000000 0x100000	/* EUMB */
     65			  0xfe000000 0xfe000000 0xc00000	/* pci i/o space */
     66			  0xfec00000 0xfec00000 0x300000	/* pci cfg regs */
     67			  0xfef00000 0xfef00000 0x100000>;	/* pci iack */
     68
     69		i2c@80003000 {
     70			#address-cells = <1>;
     71			#size-cells = <0>;
     72			cell-index = <0>;
     73			compatible = "fsl-i2c";
     74			reg = <0x80003000 0x1000>;
     75			interrupts = <5 2>;
     76			interrupt-parent = <&mpic>;
     77
     78			rtc@32 {
     79				compatible = "ricoh,rs5c372a";
     80				reg = <0x32>;
     81			};
     82		};
     83
     84		serial0: serial@80004500 {
     85			cell-index = <0>;
     86			device_type = "serial";
     87			compatible = "fsl,ns16550", "ns16550";
     88			reg = <0x80004500 0x8>;
     89			clock-frequency = <97553800>;
     90			current-speed = <9600>;
     91			interrupts = <9 0>;
     92			interrupt-parent = <&mpic>;
     93		};
     94
     95		serial1: serial@80004600 {
     96			cell-index = <1>;
     97			device_type = "serial";
     98			compatible = "fsl,ns16550", "ns16550";
     99			reg = <0x80004600 0x8>;
    100			clock-frequency = <97553800>;
    101			current-speed = <57600>;
    102			interrupts = <10 0>;
    103			interrupt-parent = <&mpic>;
    104		};
    105
    106		mpic: interrupt-controller@80040000 {
    107			#interrupt-cells = <2>;
    108			#address-cells = <0>;
    109			device_type = "open-pic";
    110			compatible = "chrp,open-pic";
    111			interrupt-controller;
    112			reg = <0x80040000 0x40000>;
    113		};
    114
    115		pci0: pci@fec00000 {
    116			#address-cells = <3>;
    117			#size-cells = <2>;
    118			#interrupt-cells = <1>;
    119			device_type = "pci";
    120			compatible = "mpc10x-pci";
    121			reg = <0xfec00000 0x400000>;
    122			ranges = <0x1000000 0x0        0x0 0xfe000000 0x0 0xc00000
    123				  0x2000000 0x0 0x80000000 0x80000000 0x0 0x70000000>;
    124			bus-range = <0 255>;
    125			clock-frequency = <133333333>;
    126			interrupt-parent = <&mpic>;
    127			interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
    128			interrupt-map = <
    129				/* IDSEL 11 - IRQ0 ETH */
    130				0x5800 0x0 0x0 0x1 &mpic 0x0 0x1
    131				0x5800 0x0 0x0 0x2 &mpic 0x1 0x1
    132				0x5800 0x0 0x0 0x3 &mpic 0x2 0x1
    133				0x5800 0x0 0x0 0x4 &mpic 0x3 0x1
    134				/* IDSEL 12 - IRQ1 IDE0 */
    135				0x6000 0x0 0x0 0x1 &mpic 0x1 0x1
    136				0x6000 0x0 0x0 0x2 &mpic 0x2 0x1
    137				0x6000 0x0 0x0 0x3 &mpic 0x3 0x1
    138				0x6000 0x0 0x0 0x4 &mpic 0x0 0x1
    139				/* IDSEL 14 - IRQ3 USB2.0 */
    140				0x7000 0x0 0x0 0x1 &mpic 0x3 0x1
    141				0x7000 0x0 0x0 0x2 &mpic 0x3 0x1
    142				0x7000 0x0 0x0 0x3 &mpic 0x3 0x1
    143				0x7000 0x0 0x0 0x4 &mpic 0x3 0x1
    144			>;
    145		};
    146	};
    147};