cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

microwatt.dts (3079B)


      1/dts-v1/;
      2
      3/ {
      4	#size-cells = <0x02>;
      5	#address-cells = <0x02>;
      6	model-name = "microwatt";
      7	compatible = "microwatt-soc";
      8
      9	aliases {
     10		serial0 = &UART0;
     11	};
     12
     13	reserved-memory {
     14		#size-cells = <0x02>;
     15		#address-cells = <0x02>;
     16		ranges;
     17	};
     18
     19	memory@0 {
     20		device_type = "memory";
     21		reg = <0x00000000 0x00000000 0x00000000 0x10000000>;
     22	};
     23
     24	cpus {
     25		#size-cells = <0x00>;
     26		#address-cells = <0x01>;
     27
     28		ibm,powerpc-cpu-features {
     29			display-name = "Microwatt";
     30			isa = <3000>;
     31			device_type = "cpu-features";
     32			compatible = "ibm,powerpc-cpu-features";
     33
     34			mmu-radix {
     35				isa = <3000>;
     36				usable-privilege = <2>;
     37			};
     38
     39			little-endian {
     40				isa = <2050>;
     41				usable-privilege = <3>;
     42				hwcap-bit-nr = <1>;
     43			};
     44
     45			cache-inhibited-large-page {
     46				isa = <2040>;
     47				usable-privilege = <2>;
     48			};
     49
     50			fixed-point-v3 {
     51				isa = <3000>;
     52				usable-privilege = <3>;
     53			};
     54
     55			no-execute {
     56				isa = <2010>;
     57				usable-privilege = <2>;
     58			};
     59
     60			floating-point {
     61				hwcap-bit-nr = <27>;
     62				isa = <0>;
     63				usable-privilege = <3>;
     64			};
     65		};
     66
     67		PowerPC,Microwatt@0 {
     68			i-cache-sets = <2>;
     69			ibm,dec-bits = <64>;
     70			reservation-granule-size = <64>;
     71			clock-frequency = <100000000>;
     72			timebase-frequency = <100000000>;
     73			i-tlb-sets = <1>;
     74			ibm,ppc-interrupt-server#s = <0>;
     75			i-cache-block-size = <64>;
     76			d-cache-block-size = <64>;
     77			d-cache-sets = <2>;
     78			i-tlb-size = <64>;
     79			cpu-version = <0x990000>;
     80			status = "okay";
     81			i-cache-size = <0x1000>;
     82			ibm,processor-radix-AP-encodings = <0x0c 0xa0000010 0x20000015 0x4000001e>;
     83			tlb-size = <0>;
     84			tlb-sets = <0>;
     85			device_type = "cpu";
     86			d-tlb-size = <128>;
     87			d-tlb-sets = <2>;
     88			reg = <0>;
     89			general-purpose;
     90			64-bit;
     91			d-cache-size = <0x1000>;
     92			ibm,chip-id = <0>;
     93			ibm,mmu-lpid-bits = <12>;
     94			ibm,mmu-pid-bits = <20>;
     95		};
     96	};
     97
     98	soc@c0000000 {
     99		compatible = "simple-bus";
    100		#address-cells = <1>;
    101		#size-cells = <1>;
    102		interrupt-parent = <&ICS>;
    103
    104		ranges = <0 0 0xc0000000 0x40000000>;
    105
    106		interrupt-controller@4000 {
    107			compatible = "openpower,xics-presentation", "ibm,ppc-xicp";
    108			ibm,interrupt-server-ranges = <0x0 0x1>;
    109			reg = <0x4000 0x100>;
    110		};
    111
    112		ICS: interrupt-controller@5000 {
    113			compatible = "openpower,xics-sources";
    114			interrupt-controller;
    115			interrupt-ranges = <0x10 0x10>;
    116			reg = <0x5000 0x100>;
    117			#address-cells = <0>;
    118			#size-cells = <0>;
    119			#interrupt-cells = <2>;
    120		};
    121
    122		UART0: serial@2000 {
    123			device_type = "serial";
    124			compatible = "ns16550";
    125			reg = <0x2000 0x8>;
    126			clock-frequency = <100000000>;
    127			current-speed = <115200>;
    128			reg-shift = <2>;
    129			fifo-size = <16>;
    130			interrupts = <0x10 0x1>;
    131		};
    132
    133		ethernet@8020000 {
    134			compatible = "litex,liteeth";
    135			reg = <0x8021000 0x100
    136				0x8020800 0x100
    137				0x8030000 0x2000>;
    138			reg-names = "mac", "mido", "buffer";
    139			litex,rx-slots = <2>;
    140			litex,tx-slots = <2>;
    141			litex,slot-size = <0x800>;
    142			interrupts = <0x11 0x1>;
    143		};
    144	};
    145
    146	chosen {
    147		bootargs = "";
    148		ibm,architecture-vec-5 = [19 00 10 00 00 00 00 00 00 00 00 00 00 00 00 00
    149					  00 00 00 00 00 00 00 00 40 00 40];
    150		stdout-path = &UART0;
    151	};
    152};