cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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io.h (2168B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifndef _IO_H
      3#define _IO_H
      4
      5#include "types.h"
      6
      7/*
      8 * Low-level I/O routines.
      9 *
     10 * Copied from <file:arch/powerpc/include/asm/io.h> (which has no copyright)
     11 */
     12static inline int in_8(const volatile unsigned char *addr)
     13{
     14	int ret;
     15
     16	__asm__ __volatile__("lbz%U1%X1 %0,%1; twi 0,%0,0; isync"
     17			     : "=r" (ret) : "m" (*addr));
     18	return ret;
     19}
     20
     21static inline void out_8(volatile unsigned char *addr, int val)
     22{
     23	__asm__ __volatile__("stb%U0%X0 %1,%0; sync"
     24			     : "=m" (*addr) : "r" (val));
     25}
     26
     27static inline unsigned in_le16(const volatile u16 *addr)
     28{
     29	unsigned ret;
     30
     31	__asm__ __volatile__("lhbrx %0,0,%1; twi 0,%0,0; isync"
     32			     : "=r" (ret) : "r" (addr), "m" (*addr));
     33
     34	return ret;
     35}
     36
     37static inline unsigned in_be16(const volatile u16 *addr)
     38{
     39	unsigned ret;
     40
     41	__asm__ __volatile__("lhz%U1%X1 %0,%1; twi 0,%0,0; isync"
     42			     : "=r" (ret) : "m" (*addr));
     43	return ret;
     44}
     45
     46static inline void out_le16(volatile u16 *addr, int val)
     47{
     48	__asm__ __volatile__("sthbrx %1,0,%2; sync" : "=m" (*addr)
     49			     : "r" (val), "r" (addr));
     50}
     51
     52static inline void out_be16(volatile u16 *addr, int val)
     53{
     54	__asm__ __volatile__("sth%U0%X0 %1,%0; sync"
     55			     : "=m" (*addr) : "r" (val));
     56}
     57
     58static inline unsigned in_le32(const volatile unsigned *addr)
     59{
     60	unsigned ret;
     61
     62	__asm__ __volatile__("lwbrx %0,0,%1; twi 0,%0,0; isync"
     63			     : "=r" (ret) : "r" (addr), "m" (*addr));
     64	return ret;
     65}
     66
     67static inline unsigned in_be32(const volatile unsigned *addr)
     68{
     69	unsigned ret;
     70
     71	__asm__ __volatile__("lwz%U1%X1 %0,%1; twi 0,%0,0; isync"
     72			     : "=r" (ret) : "m" (*addr));
     73	return ret;
     74}
     75
     76static inline void out_le32(volatile unsigned *addr, int val)
     77{
     78	__asm__ __volatile__("stwbrx %1,0,%2; sync" : "=m" (*addr)
     79			     : "r" (val), "r" (addr));
     80}
     81
     82static inline void out_be32(volatile unsigned *addr, int val)
     83{
     84	__asm__ __volatile__("stw%U0%X0 %1,%0; sync"
     85			     : "=m" (*addr) : "r" (val));
     86}
     87
     88static inline void sync(void)
     89{
     90	asm volatile("sync" : : : "memory");
     91}
     92
     93static inline void eieio(void)
     94{
     95	asm volatile("eieio" : : : "memory");
     96}
     97
     98static inline void barrier(void)
     99{
    100	asm volatile("" : : : "memory");
    101}
    102
    103#endif /* _IO_H */