cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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disassemble.h (2189B)

      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 *
      4 * Copyright IBM Corp. 2008
      5 *
      6 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
      7 */
      8
      9#ifndef __ASM_PPC_DISASSEMBLE_H__
     10#define __ASM_PPC_DISASSEMBLE_H__
     11
     12#include <linux/types.h>
     13
     14static inline unsigned int get_op(u32 inst)
     15{
     16	return inst >> 26;
     17}
     18
     19static inline unsigned int get_xop(u32 inst)
     20{
     21	return (inst >> 1) & 0x3ff;
     22}
     23
     24static inline unsigned int get_sprn(u32 inst)
     25{
     26	return ((inst >> 16) & 0x1f) | ((inst >> 6) & 0x3e0);
     27}
     28
     29static inline unsigned int get_dcrn(u32 inst)
     30{
     31	return ((inst >> 16) & 0x1f) | ((inst >> 6) & 0x3e0);
     32}
     33
     34static inline unsigned int get_tmrn(u32 inst)
     35{
     36	return ((inst >> 16) & 0x1f) | ((inst >> 6) & 0x3e0);
     37}
     38
     39static inline unsigned int get_rt(u32 inst)
     40{
     41	return (inst >> 21) & 0x1f;
     42}
     43
     44static inline unsigned int get_rs(u32 inst)
     45{
     46	return (inst >> 21) & 0x1f;
     47}
     48
     49static inline unsigned int get_ra(u32 inst)
     50{
     51	return (inst >> 16) & 0x1f;
     52}
     53
     54static inline unsigned int get_rb(u32 inst)
     55{
     56	return (inst >> 11) & 0x1f;
     57}
     58
     59static inline unsigned int get_rc(u32 inst)
     60{
     61	return inst & 0x1;
     62}
     63
     64static inline unsigned int get_ws(u32 inst)
     65{
     66	return (inst >> 11) & 0x1f;
     67}
     68
     69static inline unsigned int get_d(u32 inst)
     70{
     71	return inst & 0xffff;
     72}
     73
     74static inline unsigned int get_oc(u32 inst)
     75{
     76	return (inst >> 11) & 0x7fff;
     77}
     78
     79static inline unsigned int get_tx_or_sx(u32 inst)
     80{
     81	return (inst) & 0x1;
     82}
     83
     84#define IS_XFORM(inst)	(get_op(inst)  == 31)
     85#define IS_DSFORM(inst)	(get_op(inst) >= 56)
     86
     87/*
     88 * Create a DSISR value from the instruction
     89 */
     90static inline unsigned make_dsisr(unsigned instr)
     91{
     92	unsigned dsisr;
     93
     94
     95	/* bits  6:15 --> 22:31 */
     96	dsisr = (instr & 0x03ff0000) >> 16;
     97
     98	if (IS_XFORM(instr)) {
     99		/* bits 29:30 --> 15:16 */
    100		dsisr |= (instr & 0x00000006) << 14;
    101		/* bit     25 -->    17 */
    102		dsisr |= (instr & 0x00000040) << 8;
    103		/* bits 21:24 --> 18:21 */
    104		dsisr |= (instr & 0x00000780) << 3;
    105	} else {
    106		/* bit      5 -->    17 */
    107		dsisr |= (instr & 0x04000000) >> 12;
    108		/* bits  1: 4 --> 18:21 */
    109		dsisr |= (instr & 0x78000000) >> 17;
    110		/* bits 30:31 --> 12:13 */
    111		if (IS_DSFORM(instr))
    112			dsisr |= (instr & 0x00000003) << 18;
    113	}
    114
    115	return dsisr;
    116}
    117#endif /* __ASM_PPC_DISASSEMBLE_H__ */