cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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extable.h (1205B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifndef _ARCH_POWERPC_EXTABLE_H
      3#define _ARCH_POWERPC_EXTABLE_H
      4
      5/*
      6 * The exception table consists of pairs of relative addresses: the first is
      7 * the address of an instruction that is allowed to fault, and the second is
      8 * the address at which the program should continue.  No registers are
      9 * modified, so it is entirely up to the continuation code to figure out what
     10 * to do.
     11 *
     12 * All the routines below use bits of fixup code that are out of line with the
     13 * main instruction path.  This means when everything is well, we don't even
     14 * have to jump over them.  Further, they do not intrude on our cache or tlb
     15 * entries.
     16 */
     17
     18#define ARCH_HAS_RELATIVE_EXTABLE
     19
     20#ifndef __ASSEMBLY__
     21
     22struct exception_table_entry {
     23	int insn;
     24	int fixup;
     25};
     26
     27static inline unsigned long extable_fixup(const struct exception_table_entry *x)
     28{
     29	return (unsigned long)&x->fixup + x->fixup;
     30}
     31
     32#endif
     33
     34/*
     35 * Helper macro for exception table entries
     36 */
     37#define EX_TABLE(_fault, _target)		\
     38	stringify_in_c(.section __ex_table,"a";)\
     39	stringify_in_c(.balign 4;)		\
     40	stringify_in_c(.long (_fault) - . ;)	\
     41	stringify_in_c(.long (_target) - . ;)	\
     42	stringify_in_c(.previous)
     43
     44#endif