cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mpc85xx.h (2382B)


      1/* SPDX-License-Identifier: GPL-2.0-or-later */
      2/*
      3 * MPC85xx cpu type detection
      4 *
      5 * Copyright 2011-2012 Freescale Semiconductor, Inc.
      6 */
      7
      8#ifndef __ASM_PPC_MPC85XX_H
      9#define __ASM_PPC_MPC85XX_H
     10
     11#define SVR_REV(svr)	((svr) & 0xFF)		/* SOC design resision */
     12#define SVR_MAJ(svr)	(((svr) >>  4) & 0xF)	/* Major revision field*/
     13#define SVR_MIN(svr)	(((svr) >>  0) & 0xF)	/* Minor revision field*/
     14
     15/* Some parts define SVR[0:23] as the SOC version */
     16#define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFF7FF)	/* SOC Version fields */
     17
     18#define SVR_8533	0x803400
     19#define SVR_8535	0x803701
     20#define SVR_8536	0x803700
     21#define SVR_8540	0x803000
     22#define SVR_8541	0x807200
     23#define SVR_8543	0x803200
     24#define SVR_8544	0x803401
     25#define SVR_8545	0x803102
     26#define SVR_8547	0x803101
     27#define SVR_8548	0x803100
     28#define SVR_8555	0x807100
     29#define SVR_8560	0x807000
     30#define SVR_8567	0x807501
     31#define SVR_8568	0x807500
     32#define SVR_8569	0x808000
     33#define SVR_8572	0x80E000
     34#define SVR_P1010	0x80F100
     35#define SVR_P1011	0x80E500
     36#define SVR_P1012	0x80E501
     37#define SVR_P1013	0x80E700
     38#define SVR_P1014	0x80F101
     39#define SVR_P1017	0x80F700
     40#define SVR_P1020	0x80E400
     41#define SVR_P1021	0x80E401
     42#define SVR_P1022	0x80E600
     43#define SVR_P1023	0x80F600
     44#define SVR_P1024	0x80E402
     45#define SVR_P1025	0x80E403
     46#define SVR_P2010	0x80E300
     47#define SVR_P2020	0x80E200
     48#define SVR_P2040	0x821000
     49#define SVR_P2041	0x821001
     50#define SVR_P3041	0x821103
     51#define SVR_P4040	0x820100
     52#define SVR_P4080	0x820000
     53#define SVR_P5010	0x822100
     54#define SVR_P5020	0x822000
     55#define SVR_P5021	0X820500
     56#define SVR_P5040	0x820400
     57#define SVR_T4240	0x824000
     58#define SVR_T4120	0x824001
     59#define SVR_T4160	0x824100
     60#define SVR_T4080	0x824102
     61#define SVR_C291	0x850000
     62#define SVR_C292	0x850020
     63#define SVR_C293	0x850030
     64#define SVR_B4860	0X868000
     65#define SVR_G4860	0x868001
     66#define SVR_G4060	0x868003
     67#define SVR_B4440	0x868100
     68#define SVR_G4440	0x868101
     69#define SVR_B4420	0x868102
     70#define SVR_B4220	0x868103
     71#define SVR_T1040	0x852000
     72#define SVR_T1041	0x852001
     73#define SVR_T1042	0x852002
     74#define SVR_T1020	0x852100
     75#define SVR_T1021	0x852101
     76#define SVR_T1022	0x852102
     77#define SVR_T2080	0x853000
     78#define SVR_T2081	0x853100
     79
     80#define SVR_8610	0x80A000
     81#define SVR_8641	0x809000
     82#define SVR_8641D	0x809001
     83
     84#define SVR_9130	0x860001
     85#define SVR_9131	0x860000
     86#define SVR_9132	0x861000
     87#define SVR_9232	0x861400
     88
     89#define SVR_Unknown	0xFFFFFF
     90
     91#endif