cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pgtable.h (8596B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifndef _ASM_POWERPC_NOHASH_64_PGTABLE_H
      3#define _ASM_POWERPC_NOHASH_64_PGTABLE_H
      4/*
      5 * This file contains the functions and defines necessary to modify and use
      6 * the ppc64 non-hashed page table.
      7 */
      8
      9#include <linux/sizes.h>
     10
     11#include <asm/nohash/64/pgtable-4k.h>
     12#include <asm/barrier.h>
     13#include <asm/asm-const.h>
     14
     15/*
     16 * Size of EA range mapped by our pagetables.
     17 */
     18#define PGTABLE_EADDR_SIZE (PTE_INDEX_SIZE + PMD_INDEX_SIZE + \
     19			    PUD_INDEX_SIZE + PGD_INDEX_SIZE + PAGE_SHIFT)
     20#define PGTABLE_RANGE (ASM_CONST(1) << PGTABLE_EADDR_SIZE)
     21
     22#define PMD_CACHE_INDEX	PMD_INDEX_SIZE
     23#define PUD_CACHE_INDEX PUD_INDEX_SIZE
     24
     25/*
     26 * Define the address range of the kernel non-linear virtual area
     27 */
     28#define KERN_VIRT_START ASM_CONST(0x8000000000000000)
     29#define KERN_VIRT_SIZE	ASM_CONST(0x0000100000000000)
     30
     31/*
     32 * The vmalloc space starts at the beginning of that region, and
     33 * occupies a quarter of it on Book3E
     34 * (we keep a quarter for the virtual memmap)
     35 */
     36#define VMALLOC_START	KERN_VIRT_START
     37#define VMALLOC_SIZE	(KERN_VIRT_SIZE >> 2)
     38#define VMALLOC_END	(VMALLOC_START + VMALLOC_SIZE)
     39
     40/*
     41 * The second half of the kernel virtual space is used for IO mappings,
     42 * it's itself carved into the PIO region (ISA and PHB IO space) and
     43 * the ioremap space
     44 *
     45 *  ISA_IO_BASE = KERN_IO_START, 64K reserved area
     46 *  PHB_IO_BASE = ISA_IO_BASE + 64K to ISA_IO_BASE + 2G, PHB IO spaces
     47 * IOREMAP_BASE = ISA_IO_BASE + 2G to VMALLOC_START + PGTABLE_RANGE
     48 */
     49#define KERN_IO_START	(KERN_VIRT_START + (KERN_VIRT_SIZE >> 1))
     50#define FULL_IO_SIZE	0x80000000ul
     51#define  ISA_IO_BASE	(KERN_IO_START)
     52#define  ISA_IO_END	(KERN_IO_START + 0x10000ul)
     53#define  PHB_IO_BASE	(ISA_IO_END)
     54#define  PHB_IO_END	(KERN_IO_START + FULL_IO_SIZE)
     55#define IOREMAP_BASE	(PHB_IO_END)
     56#define IOREMAP_START	(ioremap_bot)
     57#define IOREMAP_END	(KERN_VIRT_START + KERN_VIRT_SIZE - FIXADDR_SIZE)
     58#define FIXADDR_SIZE	SZ_32M
     59
     60
     61/*
     62 * Region IDs
     63 */
     64#define REGION_SHIFT		60UL
     65#define REGION_MASK		(0xfUL << REGION_SHIFT)
     66#define REGION_ID(ea)		(((unsigned long)(ea)) >> REGION_SHIFT)
     67
     68#define VMALLOC_REGION_ID	(REGION_ID(VMALLOC_START))
     69#define KERNEL_REGION_ID	(REGION_ID(PAGE_OFFSET))
     70#define USER_REGION_ID		(0UL)
     71
     72/*
     73 * Defines the address of the vmemap area, in its own region on
     74 * after the vmalloc space on Book3E
     75 */
     76#define VMEMMAP_BASE		VMALLOC_END
     77#define VMEMMAP_END		KERN_IO_START
     78#define vmemmap			((struct page *)VMEMMAP_BASE)
     79
     80
     81/*
     82 * Include the PTE bits definitions
     83 */
     84#include <asm/nohash/pte-book3e.h>
     85
     86#define _PAGE_SAO	0
     87
     88#define PTE_RPN_MASK	(~((1UL << PTE_RPN_SHIFT) - 1))
     89
     90/*
     91 * _PAGE_CHG_MASK masks of bits that are to be preserved across
     92 * pgprot changes.
     93 */
     94#define _PAGE_CHG_MASK	(PTE_RPN_MASK | _PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_SPECIAL)
     95
     96#define H_PAGE_4K_PFN 0
     97
     98#ifndef __ASSEMBLY__
     99/* pte_clear moved to later in this file */
    100
    101static inline pte_t pte_mkwrite(pte_t pte)
    102{
    103	return __pte(pte_val(pte) | _PAGE_RW);
    104}
    105
    106static inline pte_t pte_mkdirty(pte_t pte)
    107{
    108	return __pte(pte_val(pte) | _PAGE_DIRTY);
    109}
    110
    111static inline pte_t pte_mkyoung(pte_t pte)
    112{
    113	return __pte(pte_val(pte) | _PAGE_ACCESSED);
    114}
    115
    116static inline pte_t pte_wrprotect(pte_t pte)
    117{
    118	return __pte(pte_val(pte) & ~_PAGE_RW);
    119}
    120
    121#define PMD_BAD_BITS		(PTE_TABLE_SIZE-1)
    122#define PUD_BAD_BITS		(PMD_TABLE_SIZE-1)
    123
    124static inline void pmd_set(pmd_t *pmdp, unsigned long val)
    125{
    126	*pmdp = __pmd(val);
    127}
    128
    129static inline void pmd_clear(pmd_t *pmdp)
    130{
    131	*pmdp = __pmd(0);
    132}
    133
    134static inline pte_t pmd_pte(pmd_t pmd)
    135{
    136	return __pte(pmd_val(pmd));
    137}
    138
    139#define pmd_none(pmd)		(!pmd_val(pmd))
    140#define	pmd_bad(pmd)		(!is_kernel_addr(pmd_val(pmd)) \
    141				 || (pmd_val(pmd) & PMD_BAD_BITS))
    142#define	pmd_present(pmd)	(!pmd_none(pmd))
    143#define pmd_page_vaddr(pmd)	(pmd_val(pmd) & ~PMD_MASKED_BITS)
    144extern struct page *pmd_page(pmd_t pmd);
    145#define pmd_pfn(pmd)		(page_to_pfn(pmd_page(pmd)))
    146
    147static inline void pud_set(pud_t *pudp, unsigned long val)
    148{
    149	*pudp = __pud(val);
    150}
    151
    152static inline void pud_clear(pud_t *pudp)
    153{
    154	*pudp = __pud(0);
    155}
    156
    157#define pud_none(pud)		(!pud_val(pud))
    158#define	pud_bad(pud)		(!is_kernel_addr(pud_val(pud)) \
    159				 || (pud_val(pud) & PUD_BAD_BITS))
    160#define pud_present(pud)	(pud_val(pud) != 0)
    161
    162static inline pmd_t *pud_pgtable(pud_t pud)
    163{
    164	return (pmd_t *)(pud_val(pud) & ~PUD_MASKED_BITS);
    165}
    166
    167extern struct page *pud_page(pud_t pud);
    168
    169static inline pte_t pud_pte(pud_t pud)
    170{
    171	return __pte(pud_val(pud));
    172}
    173
    174static inline pud_t pte_pud(pte_t pte)
    175{
    176	return __pud(pte_val(pte));
    177}
    178#define pud_write(pud)		pte_write(pud_pte(pud))
    179#define p4d_write(pgd)		pte_write(p4d_pte(p4d))
    180
    181static inline void p4d_set(p4d_t *p4dp, unsigned long val)
    182{
    183	*p4dp = __p4d(val);
    184}
    185
    186/* Atomic PTE updates */
    187static inline unsigned long pte_update(struct mm_struct *mm,
    188				       unsigned long addr,
    189				       pte_t *ptep, unsigned long clr,
    190				       unsigned long set,
    191				       int huge)
    192{
    193	unsigned long old = pte_val(*ptep);
    194	*ptep = __pte((old & ~clr) | set);
    195
    196	/* huge pages use the old page table lock */
    197	if (!huge)
    198		assert_pte_locked(mm, addr);
    199
    200	return old;
    201}
    202
    203static inline int pte_young(pte_t pte)
    204{
    205	return pte_val(pte) & _PAGE_ACCESSED;
    206}
    207
    208static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
    209					      unsigned long addr, pte_t *ptep)
    210{
    211	unsigned long old;
    212
    213	if (pte_young(*ptep))
    214		return 0;
    215	old = pte_update(mm, addr, ptep, _PAGE_ACCESSED, 0, 0);
    216	return (old & _PAGE_ACCESSED) != 0;
    217}
    218#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
    219#define ptep_test_and_clear_young(__vma, __addr, __ptep)		   \
    220({									   \
    221	int __r;							   \
    222	__r = __ptep_test_and_clear_young((__vma)->vm_mm, __addr, __ptep); \
    223	__r;								   \
    224})
    225
    226#define __HAVE_ARCH_PTEP_SET_WRPROTECT
    227static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
    228				      pte_t *ptep)
    229{
    230
    231	if ((pte_val(*ptep) & _PAGE_RW) == 0)
    232		return;
    233
    234	pte_update(mm, addr, ptep, _PAGE_RW, 0, 0);
    235}
    236
    237#define __HAVE_ARCH_HUGE_PTEP_SET_WRPROTECT
    238static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
    239					   unsigned long addr, pte_t *ptep)
    240{
    241	if ((pte_val(*ptep) & _PAGE_RW) == 0)
    242		return;
    243
    244	pte_update(mm, addr, ptep, _PAGE_RW, 0, 1);
    245}
    246
    247#define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
    248#define ptep_clear_flush_young(__vma, __address, __ptep)		\
    249({									\
    250	int __young = __ptep_test_and_clear_young((__vma)->vm_mm, __address, \
    251						  __ptep);		\
    252	__young;							\
    253})
    254
    255#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
    256static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
    257				       unsigned long addr, pte_t *ptep)
    258{
    259	unsigned long old = pte_update(mm, addr, ptep, ~0UL, 0, 0);
    260	return __pte(old);
    261}
    262
    263static inline void pte_clear(struct mm_struct *mm, unsigned long addr,
    264			     pte_t * ptep)
    265{
    266	pte_update(mm, addr, ptep, ~0UL, 0, 0);
    267}
    268
    269
    270/* Set the dirty and/or accessed bits atomically in a linux PTE */
    271static inline void __ptep_set_access_flags(struct vm_area_struct *vma,
    272					   pte_t *ptep, pte_t entry,
    273					   unsigned long address,
    274					   int psize)
    275{
    276	unsigned long bits = pte_val(entry) &
    277		(_PAGE_DIRTY | _PAGE_ACCESSED | _PAGE_RW | _PAGE_EXEC);
    278
    279	unsigned long old = pte_val(*ptep);
    280	*ptep = __pte(old | bits);
    281
    282	flush_tlb_page(vma, address);
    283}
    284
    285#define pte_ERROR(e) \
    286	pr_err("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
    287#define pmd_ERROR(e) \
    288	pr_err("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
    289#define pgd_ERROR(e) \
    290	pr_err("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
    291
    292/* Encode and de-code a swap entry */
    293#define MAX_SWAPFILES_CHECK() do { \
    294	BUILD_BUG_ON(MAX_SWAPFILES_SHIFT > SWP_TYPE_BITS); \
    295	} while (0)
    296
    297#define SWP_TYPE_BITS 5
    298#define __swp_type(x)		(((x).val >> _PAGE_BIT_SWAP_TYPE) \
    299				& ((1UL << SWP_TYPE_BITS) - 1))
    300#define __swp_offset(x)		((x).val >> PTE_RPN_SHIFT)
    301#define __swp_entry(type, offset)	((swp_entry_t) { \
    302					((type) << _PAGE_BIT_SWAP_TYPE) \
    303					| ((offset) << PTE_RPN_SHIFT) })
    304
    305#define __pte_to_swp_entry(pte)		((swp_entry_t) { pte_val((pte)) })
    306#define __swp_entry_to_pte(x)		__pte((x).val)
    307
    308int map_kernel_page(unsigned long ea, unsigned long pa, pgprot_t prot);
    309void unmap_kernel_page(unsigned long va);
    310extern int __meminit vmemmap_create_mapping(unsigned long start,
    311					    unsigned long page_size,
    312					    unsigned long phys);
    313extern void vmemmap_remove_mapping(unsigned long start,
    314				   unsigned long page_size);
    315void __patch_exception(int exc, unsigned long addr);
    316#define patch_exception(exc, name) do { \
    317	extern unsigned int name; \
    318	__patch_exception((exc), (unsigned long)&name); \
    319} while (0)
    320
    321#endif /* __ASSEMBLY__ */
    322
    323#endif /* _ASM_POWERPC_NOHASH_64_PGTABLE_H */