cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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tlbflush.h (2452B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifndef _ASM_POWERPC_NOHASH_TLBFLUSH_H
      3#define _ASM_POWERPC_NOHASH_TLBFLUSH_H
      4
      5/*
      6 * TLB flushing:
      7 *
      8 *  - flush_tlb_mm(mm) flushes the specified mm context TLB's
      9 *  - flush_tlb_page(vma, vmaddr) flushes one page
     10 *  - local_flush_tlb_mm(mm, full) flushes the specified mm context on
     11 *                           the local processor
     12 *  - local_flush_tlb_page(vma, vmaddr) flushes one page on the local processor
     13 *  - flush_tlb_range(vma, start, end) flushes a range of pages
     14 *  - flush_tlb_kernel_range(start, end) flushes a range of kernel pages
     15 *
     16 */
     17
     18/*
     19 * TLB flushing for software loaded TLB chips
     20 *
     21 * TODO: (CONFIG_FSL_BOOKE) determine if flush_tlb_range &
     22 * flush_tlb_kernel_range are best implemented as tlbia vs
     23 * specific tlbie's
     24 */
     25
     26struct vm_area_struct;
     27struct mm_struct;
     28
     29#define MMU_NO_CONTEXT      	((unsigned int)-1)
     30
     31extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
     32			    unsigned long end);
     33
     34#ifdef CONFIG_PPC_8xx
     35static inline void local_flush_tlb_mm(struct mm_struct *mm)
     36{
     37	unsigned int pid = READ_ONCE(mm->context.id);
     38
     39	if (pid != MMU_NO_CONTEXT)
     40		asm volatile ("sync; tlbia; isync" : : : "memory");
     41}
     42
     43static inline void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr)
     44{
     45	asm volatile ("tlbie %0; sync" : : "r" (vmaddr) : "memory");
     46}
     47
     48static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end)
     49{
     50	start &= PAGE_MASK;
     51
     52	if (end - start <= PAGE_SIZE)
     53		asm volatile ("tlbie %0; sync" : : "r" (start) : "memory");
     54	else
     55		asm volatile ("sync; tlbia; isync" : : : "memory");
     56}
     57#else
     58extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
     59extern void local_flush_tlb_mm(struct mm_struct *mm);
     60extern void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
     61
     62extern void __local_flush_tlb_page(struct mm_struct *mm, unsigned long vmaddr,
     63				   int tsize, int ind);
     64#endif
     65
     66#ifdef CONFIG_SMP
     67extern void flush_tlb_mm(struct mm_struct *mm);
     68extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
     69extern void __flush_tlb_page(struct mm_struct *mm, unsigned long vmaddr,
     70			     int tsize, int ind);
     71#else
     72#define flush_tlb_mm(mm)		local_flush_tlb_mm(mm)
     73#define flush_tlb_page(vma,addr)	local_flush_tlb_page(vma,addr)
     74#define __flush_tlb_page(mm,addr,p,i)	__local_flush_tlb_page(mm,addr,p,i)
     75#endif
     76
     77#endif /* _ASM_POWERPC_NOHASH_TLBFLUSH_H */