cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pgtable-be-types.h (2601B)

      1/* SPDX-License-Identifier: GPL-2.0 */
      2#ifndef _ASM_POWERPC_PGTABLE_BE_TYPES_H
      3#define _ASM_POWERPC_PGTABLE_BE_TYPES_H
      4
      5#include <asm/cmpxchg.h>
      6
      7/* PTE level */
      8typedef struct { __be64 pte; } pte_t;
      9#define __pte(x)	((pte_t) { cpu_to_be64(x) })
     10#define __pte_raw(x)	((pte_t) { (x) })
     11static inline unsigned long pte_val(pte_t x)
     12{
     13	return be64_to_cpu(x.pte);
     14}
     15
     16static inline __be64 pte_raw(pte_t x)
     17{
     18	return x.pte;
     19}
     20
     21/* PMD level */
     22#ifdef CONFIG_PPC64
     23typedef struct { __be64 pmd; } pmd_t;
     24#define __pmd(x)	((pmd_t) { cpu_to_be64(x) })
     25#define __pmd_raw(x)	((pmd_t) { (x) })
     26static inline unsigned long pmd_val(pmd_t x)
     27{
     28	return be64_to_cpu(x.pmd);
     29}
     30
     31static inline __be64 pmd_raw(pmd_t x)
     32{
     33	return x.pmd;
     34}
     35
     36/* 64 bit always use 4 level table. */
     37typedef struct { __be64 pud; } pud_t;
     38#define __pud(x)	((pud_t) { cpu_to_be64(x) })
     39#define __pud_raw(x)	((pud_t) { (x) })
     40static inline unsigned long pud_val(pud_t x)
     41{
     42	return be64_to_cpu(x.pud);
     43}
     44
     45static inline __be64 pud_raw(pud_t x)
     46{
     47	return x.pud;
     48}
     49
     50#endif /* CONFIG_PPC64 */
     51
     52/* PGD level */
     53typedef struct { __be64 pgd; } pgd_t;
     54#define __pgd(x)	((pgd_t) { cpu_to_be64(x) })
     55#define __pgd_raw(x)	((pgd_t) { (x) })
     56static inline unsigned long pgd_val(pgd_t x)
     57{
     58	return be64_to_cpu(x.pgd);
     59}
     60
     61static inline __be64 pgd_raw(pgd_t x)
     62{
     63	return x.pgd;
     64}
     65
     66/* Page protection bits */
     67typedef struct { unsigned long pgprot; } pgprot_t;
     68#define pgprot_val(x)	((x).pgprot)
     69#define __pgprot(x)	((pgprot_t) { (x) })
     70
     71/*
     72 * With hash config 64k pages additionally define a bigger "real PTE" type that
     73 * gathers the "second half" part of the PTE for pseudo 64k pages
     74 */
     75#ifdef CONFIG_PPC_64K_PAGES
     76typedef struct { pte_t pte; unsigned long hidx; } real_pte_t;
     77#else
     78typedef struct { pte_t pte; } real_pte_t;
     79#endif
     80
     81static inline bool pte_xchg(pte_t *ptep, pte_t old, pte_t new)
     82{
     83	unsigned long *p = (unsigned long *)ptep;
     84	__be64 prev;
     85
     86	/* See comment in switch_mm_irqs_off() */
     87	prev = (__force __be64)__cmpxchg_u64(p, (__force unsigned long)pte_raw(old),
     88					     (__force unsigned long)pte_raw(new));
     89
     90	return pte_raw(old) == prev;
     91}
     92
     93static inline bool pmd_xchg(pmd_t *pmdp, pmd_t old, pmd_t new)
     94{
     95	unsigned long *p = (unsigned long *)pmdp;
     96	__be64 prev;
     97
     98	prev = (__force __be64)__cmpxchg_u64(p, (__force unsigned long)pmd_raw(old),
     99					     (__force unsigned long)pmd_raw(new));
    100
    101	return pmd_raw(old) == prev;
    102}
    103
    104typedef struct { __be64 pdbe; } hugepd_t;
    105#define __hugepd(x) ((hugepd_t) { cpu_to_be64(x) })
    106
    107static inline unsigned long hpd_val(hugepd_t x)
    108{
    109	return be64_to_cpu(x.pdbe);
    110}
    111
    112#endif /* _ASM_POWERPC_PGTABLE_BE_TYPES_H */