cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

ppc-pci.h (2149B)


      1/* SPDX-License-Identifier: GPL-2.0-or-later */
      2/*
      3 * c 2001 PPC 64 Team, IBM Corp
      4 */
      5#ifndef _ASM_POWERPC_PPC_PCI_H
      6#define _ASM_POWERPC_PPC_PCI_H
      7#ifdef __KERNEL__
      8
      9#ifdef CONFIG_PCI
     10
     11#include <linux/pci.h>
     12#include <asm/pci-bridge.h>
     13
     14extern unsigned long isa_io_base;
     15
     16extern struct list_head hose_list;
     17
     18extern struct pci_dev *isa_bridge_pcidev;	/* may be NULL if no ISA bus */
     19
     20/** Bus Unit ID macros; get low and hi 32-bits of the 64-bit BUID */
     21#define BUID_HI(buid) upper_32_bits(buid)
     22#define BUID_LO(buid) lower_32_bits(buid)
     23
     24/* PCI device_node operations */
     25struct device_node;
     26struct pci_dn;
     27
     28void *pci_traverse_device_nodes(struct device_node *start,
     29				void *(*fn)(struct device_node *, void *),
     30				void *data);
     31extern void pci_devs_phb_init_dynamic(struct pci_controller *phb);
     32
     33/* From rtas_pci.h */
     34extern void init_pci_config_tokens (void);
     35extern unsigned long get_phb_buid (struct device_node *);
     36extern int rtas_setup_phb(struct pci_controller *phb);
     37
     38#ifdef CONFIG_EEH
     39
     40void eeh_addr_cache_insert_dev(struct pci_dev *dev);
     41void eeh_addr_cache_rmv_dev(struct pci_dev *dev);
     42struct eeh_dev *eeh_addr_cache_get_dev(unsigned long addr);
     43void eeh_slot_error_detail(struct eeh_pe *pe, int severity);
     44int eeh_pci_enable(struct eeh_pe *pe, int function);
     45int eeh_pe_reset_full(struct eeh_pe *pe, bool include_passed);
     46void eeh_save_bars(struct eeh_dev *edev);
     47int rtas_write_config(struct pci_dn *, int where, int size, u32 val);
     48int rtas_read_config(struct pci_dn *, int where, int size, u32 *val);
     49void eeh_pe_state_mark(struct eeh_pe *pe, int state);
     50void eeh_pe_mark_isolated(struct eeh_pe *pe);
     51void eeh_pe_state_clear(struct eeh_pe *pe, int state, bool include_passed);
     52void eeh_pe_state_mark_with_cfg(struct eeh_pe *pe, int state);
     53void eeh_pe_dev_mode_mark(struct eeh_pe *pe, int mode);
     54
     55void eeh_sysfs_add_device(struct pci_dev *pdev);
     56void eeh_sysfs_remove_device(struct pci_dev *pdev);
     57
     58#endif /* CONFIG_EEH */
     59
     60#define PCI_BUSNO(bdfn) ((bdfn >> 8) & 0xff)
     61
     62#else /* CONFIG_PCI */
     63static inline void init_pci_config_tokens(void) { }
     64#endif /* !CONFIG_PCI */
     65
     66#endif /* __KERNEL__ */
     67#endif /* _ASM_POWERPC_PPC_PCI_H */