cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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time.h (3009B)

      1/* SPDX-License-Identifier: GPL-2.0-or-later */
      2/*
      3 * Common time prototypes and such for all ppc machines.
      4 *
      5 * Written by Cort Dougan (cort@cs.nmt.edu) to merge
      6 * Paul Mackerras' version and mine for PReP and Pmac.
      7 */
      8
      9#ifndef __POWERPC_TIME_H
     10#define __POWERPC_TIME_H
     11
     12#ifdef __KERNEL__
     13#include <linux/types.h>
     14#include <linux/percpu.h>
     15
     16#include <asm/processor.h>
     17#include <asm/cpu_has_feature.h>
     18#include <asm/vdso/timebase.h>
     19
     20/* time.c */
     21extern u64 decrementer_max;
     22
     23extern unsigned long tb_ticks_per_jiffy;
     24extern unsigned long tb_ticks_per_usec;
     25extern unsigned long tb_ticks_per_sec;
     26extern struct clock_event_device decrementer_clockevent;
     27extern u64 decrementer_max;
     28
     29
     30extern void generic_calibrate_decr(void);
     31
     32/* Some sane defaults: 125 MHz timebase, 1GHz processor */
     33extern unsigned long ppc_proc_freq;
     34#define DEFAULT_PROC_FREQ	(DEFAULT_TB_FREQ * 8)
     35extern unsigned long ppc_tb_freq;
     36#define DEFAULT_TB_FREQ		125000000UL
     37
     38extern bool tb_invalid;
     39
     40struct div_result {
     41	u64 result_high;
     42	u64 result_low;
     43};
     44
     45static inline u64 get_vtb(void)
     46{
     47	if (cpu_has_feature(CPU_FTR_ARCH_207S))
     48		return mfspr(SPRN_VTB);
     49
     50	return 0;
     51}
     52
     53/* Accessor functions for the decrementer register.
     54 * The 4xx doesn't even have a decrementer.  I tried to use the
     55 * generic timer interrupt code, which seems OK, with the 4xx PIT
     56 * in auto-reload mode.  The problem is PIT stops counting when it
     57 * hits zero.  If it would wrap, we could use it just like a decrementer.
     58 */
     59static inline u64 get_dec(void)
     60{
     61	if (IS_ENABLED(CONFIG_40x))
     62		return mfspr(SPRN_PIT);
     63
     64	return mfspr(SPRN_DEC);
     65}
     66
     67/*
     68 * Note: Book E and 4xx processors differ from other PowerPC processors
     69 * in when the decrementer generates its interrupt: on the 1 to 0
     70 * transition for Book E/4xx, but on the 0 to -1 transition for others.
     71 */
     72static inline void set_dec(u64 val)
     73{
     74	if (IS_ENABLED(CONFIG_40x))
     75		mtspr(SPRN_PIT, (u32)val);
     76	else if (IS_ENABLED(CONFIG_BOOKE))
     77		mtspr(SPRN_DEC, val);
     78	else
     79		mtspr(SPRN_DEC, val - 1);
     80}
     81
     82static inline unsigned long tb_ticks_since(unsigned long tstamp)
     83{
     84	return mftb() - tstamp;
     85}
     86
     87#define mulhwu(x,y) \
     88({unsigned z; asm ("mulhwu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
     89
     90#ifdef CONFIG_PPC64
     91#define mulhdu(x,y) \
     92({unsigned long z; asm ("mulhdu %0,%1,%2" : "=r" (z) : "r" (x), "r" (y)); z;})
     93#else
     94extern u64 mulhdu(u64, u64);
     95#endif
     96
     97extern void div128_by_32(u64 dividend_high, u64 dividend_low,
     98			 unsigned divisor, struct div_result *dr);
     99
    100extern void secondary_cpu_time_init(void);
    101extern void __init time_init(void);
    102
    103DECLARE_PER_CPU(u64, decrementers_next_tb);
    104
    105static inline u64 timer_get_next_tb(void)
    106{
    107	return __this_cpu_read(decrementers_next_tb);
    108}
    109
    110#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
    111void timer_rearm_host_dec(u64 now);
    112#endif
    113
    114/* Convert timebase ticks to nanoseconds */
    115unsigned long long tb_to_ns(unsigned long long tb_ticks);
    116
    117void timer_broadcast_interrupt(void);
    118
    119/* SPLPAR */
    120void accumulate_stolen_time(void);
    121
    122#endif /* __KERNEL__ */
    123#endif /* __POWERPC_TIME_H */