cputable.c (65618B)
1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org) 4 * 5 * Modifications for ppc64: 6 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com> 7 */ 8 9#include <linux/string.h> 10#include <linux/sched.h> 11#include <linux/threads.h> 12#include <linux/init.h> 13#include <linux/export.h> 14#include <linux/jump_label.h> 15#include <linux/of.h> 16 17#include <asm/cputable.h> 18#include <asm/mce.h> 19#include <asm/mmu.h> 20#include <asm/setup.h> 21 22static struct cpu_spec the_cpu_spec __read_mostly; 23 24struct cpu_spec* cur_cpu_spec __read_mostly = NULL; 25EXPORT_SYMBOL(cur_cpu_spec); 26 27/* The platform string corresponding to the real PVR */ 28const char *powerpc_base_platform; 29 30/* NOTE: 31 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's 32 * the responsibility of the appropriate CPU save/restore functions to 33 * eventually copy these settings over. Those save/restore aren't yet 34 * part of the cputable though. That has to be fixed for both ppc32 35 * and ppc64 36 */ 37#ifdef CONFIG_PPC32 38extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec); 39extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec); 40extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec); 41extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec); 42extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec); 43extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); 44extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 45extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); 46extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec); 47extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 48extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); 49extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec); 50extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec); 51extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 52extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 53extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 54extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec); 55extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec); 56extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec); 57extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec); 58extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec); 59#endif /* CONFIG_PPC32 */ 60#ifdef CONFIG_PPC64 61#include <asm/cpu_setup_power.h> 62extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec); 63extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec); 64extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 65extern void __restore_cpu_pa6t(void); 66extern void __restore_cpu_ppc970(void); 67extern long __machine_check_early_realmode_p7(struct pt_regs *regs); 68extern long __machine_check_early_realmode_p8(struct pt_regs *regs); 69extern long __machine_check_early_realmode_p9(struct pt_regs *regs); 70#endif /* CONFIG_PPC64 */ 71#if defined(CONFIG_E500) 72extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec); 73extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec); 74extern void __restore_cpu_e5500(void); 75extern void __restore_cpu_e6500(void); 76#endif /* CONFIG_E500 */ 77 78/* This table only contains "desktop" CPUs, it need to be filled with embedded 79 * ones as well... 80 */ 81#define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 82 PPC_FEATURE_HAS_MMU) 83#define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64) 84#define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4) 85#define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\ 86 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 87#define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\ 88 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 89#define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 90 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 91 PPC_FEATURE_TRUE_LE | \ 92 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 93#define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 94 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 95 PPC_FEATURE_TRUE_LE | \ 96 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 97#define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR) 98#define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\ 99 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 100 PPC_FEATURE_TRUE_LE | \ 101 PPC_FEATURE_PSERIES_PERFMON_COMPAT) 102#define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \ 103 PPC_FEATURE2_HTM_COMP | \ 104 PPC_FEATURE2_HTM_NOSC_COMP | \ 105 PPC_FEATURE2_DSCR | \ 106 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ 107 PPC_FEATURE2_VEC_CRYPTO) 108#define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 109 PPC_FEATURE_TRUE_LE | \ 110 PPC_FEATURE_HAS_ALTIVEC_COMP) 111#define COMMON_USER_POWER9 COMMON_USER_POWER8 112#define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \ 113 PPC_FEATURE2_ARCH_3_00 | \ 114 PPC_FEATURE2_HAS_IEEE128 | \ 115 PPC_FEATURE2_DARN | \ 116 PPC_FEATURE2_SCV) 117#define COMMON_USER_POWER10 COMMON_USER_POWER9 118#define COMMON_USER2_POWER10 (PPC_FEATURE2_ARCH_3_1 | \ 119 PPC_FEATURE2_MMA | \ 120 PPC_FEATURE2_ARCH_3_00 | \ 121 PPC_FEATURE2_HAS_IEEE128 | \ 122 PPC_FEATURE2_DARN | \ 123 PPC_FEATURE2_SCV | \ 124 PPC_FEATURE2_ARCH_2_07 | \ 125 PPC_FEATURE2_DSCR | \ 126 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \ 127 PPC_FEATURE2_VEC_CRYPTO) 128 129#ifdef CONFIG_PPC_BOOK3E_64 130#define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE) 131#else 132#define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \ 133 PPC_FEATURE_BOOKE) 134#endif 135 136static struct cpu_spec __initdata cpu_specs[] = { 137#ifdef CONFIG_PPC_BOOK3S_64 138 { /* PPC970 */ 139 .pvr_mask = 0xffff0000, 140 .pvr_value = 0x00390000, 141 .cpu_name = "PPC970", 142 .cpu_features = CPU_FTRS_PPC970, 143 .cpu_user_features = COMMON_USER_POWER4 | 144 PPC_FEATURE_HAS_ALTIVEC_COMP, 145 .mmu_features = MMU_FTRS_PPC970, 146 .icache_bsize = 128, 147 .dcache_bsize = 128, 148 .num_pmcs = 8, 149 .pmc_type = PPC_PMC_IBM, 150 .cpu_setup = __setup_cpu_ppc970, 151 .cpu_restore = __restore_cpu_ppc970, 152 .oprofile_cpu_type = "ppc64/970", 153 .platform = "ppc970", 154 }, 155 { /* PPC970FX */ 156 .pvr_mask = 0xffff0000, 157 .pvr_value = 0x003c0000, 158 .cpu_name = "PPC970FX", 159 .cpu_features = CPU_FTRS_PPC970, 160 .cpu_user_features = COMMON_USER_POWER4 | 161 PPC_FEATURE_HAS_ALTIVEC_COMP, 162 .mmu_features = MMU_FTRS_PPC970, 163 .icache_bsize = 128, 164 .dcache_bsize = 128, 165 .num_pmcs = 8, 166 .pmc_type = PPC_PMC_IBM, 167 .cpu_setup = __setup_cpu_ppc970, 168 .cpu_restore = __restore_cpu_ppc970, 169 .oprofile_cpu_type = "ppc64/970", 170 .platform = "ppc970", 171 }, 172 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */ 173 .pvr_mask = 0xffffffff, 174 .pvr_value = 0x00440100, 175 .cpu_name = "PPC970MP", 176 .cpu_features = CPU_FTRS_PPC970, 177 .cpu_user_features = COMMON_USER_POWER4 | 178 PPC_FEATURE_HAS_ALTIVEC_COMP, 179 .mmu_features = MMU_FTRS_PPC970, 180 .icache_bsize = 128, 181 .dcache_bsize = 128, 182 .num_pmcs = 8, 183 .pmc_type = PPC_PMC_IBM, 184 .cpu_setup = __setup_cpu_ppc970, 185 .cpu_restore = __restore_cpu_ppc970, 186 .oprofile_cpu_type = "ppc64/970MP", 187 .platform = "ppc970", 188 }, 189 { /* PPC970MP */ 190 .pvr_mask = 0xffff0000, 191 .pvr_value = 0x00440000, 192 .cpu_name = "PPC970MP", 193 .cpu_features = CPU_FTRS_PPC970, 194 .cpu_user_features = COMMON_USER_POWER4 | 195 PPC_FEATURE_HAS_ALTIVEC_COMP, 196 .mmu_features = MMU_FTRS_PPC970, 197 .icache_bsize = 128, 198 .dcache_bsize = 128, 199 .num_pmcs = 8, 200 .pmc_type = PPC_PMC_IBM, 201 .cpu_setup = __setup_cpu_ppc970MP, 202 .cpu_restore = __restore_cpu_ppc970, 203 .oprofile_cpu_type = "ppc64/970MP", 204 .platform = "ppc970", 205 }, 206 { /* PPC970GX */ 207 .pvr_mask = 0xffff0000, 208 .pvr_value = 0x00450000, 209 .cpu_name = "PPC970GX", 210 .cpu_features = CPU_FTRS_PPC970, 211 .cpu_user_features = COMMON_USER_POWER4 | 212 PPC_FEATURE_HAS_ALTIVEC_COMP, 213 .mmu_features = MMU_FTRS_PPC970, 214 .icache_bsize = 128, 215 .dcache_bsize = 128, 216 .num_pmcs = 8, 217 .pmc_type = PPC_PMC_IBM, 218 .cpu_setup = __setup_cpu_ppc970, 219 .oprofile_cpu_type = "ppc64/970", 220 .platform = "ppc970", 221 }, 222 { /* Power5 GR */ 223 .pvr_mask = 0xffff0000, 224 .pvr_value = 0x003a0000, 225 .cpu_name = "POWER5 (gr)", 226 .cpu_features = CPU_FTRS_POWER5, 227 .cpu_user_features = COMMON_USER_POWER5, 228 .mmu_features = MMU_FTRS_POWER5, 229 .icache_bsize = 128, 230 .dcache_bsize = 128, 231 .num_pmcs = 6, 232 .pmc_type = PPC_PMC_IBM, 233 .oprofile_cpu_type = "ppc64/power5", 234 .platform = "power5", 235 }, 236 { /* Power5++ */ 237 .pvr_mask = 0xffffff00, 238 .pvr_value = 0x003b0300, 239 .cpu_name = "POWER5+ (gs)", 240 .cpu_features = CPU_FTRS_POWER5, 241 .cpu_user_features = COMMON_USER_POWER5_PLUS, 242 .mmu_features = MMU_FTRS_POWER5, 243 .icache_bsize = 128, 244 .dcache_bsize = 128, 245 .num_pmcs = 6, 246 .oprofile_cpu_type = "ppc64/power5++", 247 .platform = "power5+", 248 }, 249 { /* Power5 GS */ 250 .pvr_mask = 0xffff0000, 251 .pvr_value = 0x003b0000, 252 .cpu_name = "POWER5+ (gs)", 253 .cpu_features = CPU_FTRS_POWER5, 254 .cpu_user_features = COMMON_USER_POWER5_PLUS, 255 .mmu_features = MMU_FTRS_POWER5, 256 .icache_bsize = 128, 257 .dcache_bsize = 128, 258 .num_pmcs = 6, 259 .pmc_type = PPC_PMC_IBM, 260 .oprofile_cpu_type = "ppc64/power5+", 261 .platform = "power5+", 262 }, 263 { /* POWER6 in P5+ mode; 2.04-compliant processor */ 264 .pvr_mask = 0xffffffff, 265 .pvr_value = 0x0f000001, 266 .cpu_name = "POWER5+", 267 .cpu_features = CPU_FTRS_POWER5, 268 .cpu_user_features = COMMON_USER_POWER5_PLUS, 269 .mmu_features = MMU_FTRS_POWER5, 270 .icache_bsize = 128, 271 .dcache_bsize = 128, 272 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 273 .platform = "power5+", 274 }, 275 { /* Power6 */ 276 .pvr_mask = 0xffff0000, 277 .pvr_value = 0x003e0000, 278 .cpu_name = "POWER6 (raw)", 279 .cpu_features = CPU_FTRS_POWER6, 280 .cpu_user_features = COMMON_USER_POWER6 | 281 PPC_FEATURE_POWER6_EXT, 282 .mmu_features = MMU_FTRS_POWER6, 283 .icache_bsize = 128, 284 .dcache_bsize = 128, 285 .num_pmcs = 6, 286 .pmc_type = PPC_PMC_IBM, 287 .oprofile_cpu_type = "ppc64/power6", 288 .platform = "power6x", 289 }, 290 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */ 291 .pvr_mask = 0xffffffff, 292 .pvr_value = 0x0f000002, 293 .cpu_name = "POWER6 (architected)", 294 .cpu_features = CPU_FTRS_POWER6, 295 .cpu_user_features = COMMON_USER_POWER6, 296 .mmu_features = MMU_FTRS_POWER6, 297 .icache_bsize = 128, 298 .dcache_bsize = 128, 299 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 300 .platform = "power6", 301 }, 302 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */ 303 .pvr_mask = 0xffffffff, 304 .pvr_value = 0x0f000003, 305 .cpu_name = "POWER7 (architected)", 306 .cpu_features = CPU_FTRS_POWER7, 307 .cpu_user_features = COMMON_USER_POWER7, 308 .cpu_user_features2 = COMMON_USER2_POWER7, 309 .mmu_features = MMU_FTRS_POWER7, 310 .icache_bsize = 128, 311 .dcache_bsize = 128, 312 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 313 .cpu_setup = __setup_cpu_power7, 314 .cpu_restore = __restore_cpu_power7, 315 .machine_check_early = __machine_check_early_realmode_p7, 316 .platform = "power7", 317 }, 318 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */ 319 .pvr_mask = 0xffffffff, 320 .pvr_value = 0x0f000004, 321 .cpu_name = "POWER8 (architected)", 322 .cpu_features = CPU_FTRS_POWER8, 323 .cpu_user_features = COMMON_USER_POWER8, 324 .cpu_user_features2 = COMMON_USER2_POWER8, 325 .mmu_features = MMU_FTRS_POWER8, 326 .icache_bsize = 128, 327 .dcache_bsize = 128, 328 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 329 .cpu_setup = __setup_cpu_power8, 330 .cpu_restore = __restore_cpu_power8, 331 .machine_check_early = __machine_check_early_realmode_p8, 332 .platform = "power8", 333 }, 334 { /* 3.00-compliant processor, i.e. Power9 "architected" mode */ 335 .pvr_mask = 0xffffffff, 336 .pvr_value = 0x0f000005, 337 .cpu_name = "POWER9 (architected)", 338 .cpu_features = CPU_FTRS_POWER9, 339 .cpu_user_features = COMMON_USER_POWER9, 340 .cpu_user_features2 = COMMON_USER2_POWER9, 341 .mmu_features = MMU_FTRS_POWER9, 342 .icache_bsize = 128, 343 .dcache_bsize = 128, 344 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 345 .cpu_setup = __setup_cpu_power9, 346 .cpu_restore = __restore_cpu_power9, 347 .platform = "power9", 348 }, 349 { /* 3.1-compliant processor, i.e. Power10 "architected" mode */ 350 .pvr_mask = 0xffffffff, 351 .pvr_value = 0x0f000006, 352 .cpu_name = "POWER10 (architected)", 353 .cpu_features = CPU_FTRS_POWER10, 354 .cpu_user_features = COMMON_USER_POWER10, 355 .cpu_user_features2 = COMMON_USER2_POWER10, 356 .mmu_features = MMU_FTRS_POWER10, 357 .icache_bsize = 128, 358 .dcache_bsize = 128, 359 .oprofile_cpu_type = "ppc64/ibm-compat-v1", 360 .cpu_setup = __setup_cpu_power10, 361 .cpu_restore = __restore_cpu_power10, 362 .platform = "power10", 363 }, 364 { /* Power7 */ 365 .pvr_mask = 0xffff0000, 366 .pvr_value = 0x003f0000, 367 .cpu_name = "POWER7 (raw)", 368 .cpu_features = CPU_FTRS_POWER7, 369 .cpu_user_features = COMMON_USER_POWER7, 370 .cpu_user_features2 = COMMON_USER2_POWER7, 371 .mmu_features = MMU_FTRS_POWER7, 372 .icache_bsize = 128, 373 .dcache_bsize = 128, 374 .num_pmcs = 6, 375 .pmc_type = PPC_PMC_IBM, 376 .oprofile_cpu_type = "ppc64/power7", 377 .cpu_setup = __setup_cpu_power7, 378 .cpu_restore = __restore_cpu_power7, 379 .machine_check_early = __machine_check_early_realmode_p7, 380 .platform = "power7", 381 }, 382 { /* Power7+ */ 383 .pvr_mask = 0xffff0000, 384 .pvr_value = 0x004A0000, 385 .cpu_name = "POWER7+ (raw)", 386 .cpu_features = CPU_FTRS_POWER7, 387 .cpu_user_features = COMMON_USER_POWER7, 388 .cpu_user_features2 = COMMON_USER2_POWER7, 389 .mmu_features = MMU_FTRS_POWER7, 390 .icache_bsize = 128, 391 .dcache_bsize = 128, 392 .num_pmcs = 6, 393 .pmc_type = PPC_PMC_IBM, 394 .oprofile_cpu_type = "ppc64/power7", 395 .cpu_setup = __setup_cpu_power7, 396 .cpu_restore = __restore_cpu_power7, 397 .machine_check_early = __machine_check_early_realmode_p7, 398 .platform = "power7+", 399 }, 400 { /* Power8E */ 401 .pvr_mask = 0xffff0000, 402 .pvr_value = 0x004b0000, 403 .cpu_name = "POWER8E (raw)", 404 .cpu_features = CPU_FTRS_POWER8E, 405 .cpu_user_features = COMMON_USER_POWER8, 406 .cpu_user_features2 = COMMON_USER2_POWER8, 407 .mmu_features = MMU_FTRS_POWER8, 408 .icache_bsize = 128, 409 .dcache_bsize = 128, 410 .num_pmcs = 6, 411 .pmc_type = PPC_PMC_IBM, 412 .oprofile_cpu_type = "ppc64/power8", 413 .cpu_setup = __setup_cpu_power8, 414 .cpu_restore = __restore_cpu_power8, 415 .machine_check_early = __machine_check_early_realmode_p8, 416 .platform = "power8", 417 }, 418 { /* Power8NVL */ 419 .pvr_mask = 0xffff0000, 420 .pvr_value = 0x004c0000, 421 .cpu_name = "POWER8NVL (raw)", 422 .cpu_features = CPU_FTRS_POWER8, 423 .cpu_user_features = COMMON_USER_POWER8, 424 .cpu_user_features2 = COMMON_USER2_POWER8, 425 .mmu_features = MMU_FTRS_POWER8, 426 .icache_bsize = 128, 427 .dcache_bsize = 128, 428 .num_pmcs = 6, 429 .pmc_type = PPC_PMC_IBM, 430 .oprofile_cpu_type = "ppc64/power8", 431 .cpu_setup = __setup_cpu_power8, 432 .cpu_restore = __restore_cpu_power8, 433 .machine_check_early = __machine_check_early_realmode_p8, 434 .platform = "power8", 435 }, 436 { /* Power8 */ 437 .pvr_mask = 0xffff0000, 438 .pvr_value = 0x004d0000, 439 .cpu_name = "POWER8 (raw)", 440 .cpu_features = CPU_FTRS_POWER8, 441 .cpu_user_features = COMMON_USER_POWER8, 442 .cpu_user_features2 = COMMON_USER2_POWER8, 443 .mmu_features = MMU_FTRS_POWER8, 444 .icache_bsize = 128, 445 .dcache_bsize = 128, 446 .num_pmcs = 6, 447 .pmc_type = PPC_PMC_IBM, 448 .oprofile_cpu_type = "ppc64/power8", 449 .cpu_setup = __setup_cpu_power8, 450 .cpu_restore = __restore_cpu_power8, 451 .machine_check_early = __machine_check_early_realmode_p8, 452 .platform = "power8", 453 }, 454 { /* Power9 DD2.0 */ 455 .pvr_mask = 0xffffefff, 456 .pvr_value = 0x004e0200, 457 .cpu_name = "POWER9 (raw)", 458 .cpu_features = CPU_FTRS_POWER9_DD2_0, 459 .cpu_user_features = COMMON_USER_POWER9, 460 .cpu_user_features2 = COMMON_USER2_POWER9, 461 .mmu_features = MMU_FTRS_POWER9, 462 .icache_bsize = 128, 463 .dcache_bsize = 128, 464 .num_pmcs = 6, 465 .pmc_type = PPC_PMC_IBM, 466 .oprofile_cpu_type = "ppc64/power9", 467 .cpu_setup = __setup_cpu_power9, 468 .cpu_restore = __restore_cpu_power9, 469 .machine_check_early = __machine_check_early_realmode_p9, 470 .platform = "power9", 471 }, 472 { /* Power9 DD 2.1 */ 473 .pvr_mask = 0xffffefff, 474 .pvr_value = 0x004e0201, 475 .cpu_name = "POWER9 (raw)", 476 .cpu_features = CPU_FTRS_POWER9_DD2_1, 477 .cpu_user_features = COMMON_USER_POWER9, 478 .cpu_user_features2 = COMMON_USER2_POWER9, 479 .mmu_features = MMU_FTRS_POWER9, 480 .icache_bsize = 128, 481 .dcache_bsize = 128, 482 .num_pmcs = 6, 483 .pmc_type = PPC_PMC_IBM, 484 .oprofile_cpu_type = "ppc64/power9", 485 .cpu_setup = __setup_cpu_power9, 486 .cpu_restore = __restore_cpu_power9, 487 .machine_check_early = __machine_check_early_realmode_p9, 488 .platform = "power9", 489 }, 490 { /* Power9 DD2.2 */ 491 .pvr_mask = 0xffffefff, 492 .pvr_value = 0x004e0202, 493 .cpu_name = "POWER9 (raw)", 494 .cpu_features = CPU_FTRS_POWER9_DD2_2, 495 .cpu_user_features = COMMON_USER_POWER9, 496 .cpu_user_features2 = COMMON_USER2_POWER9, 497 .mmu_features = MMU_FTRS_POWER9, 498 .icache_bsize = 128, 499 .dcache_bsize = 128, 500 .num_pmcs = 6, 501 .pmc_type = PPC_PMC_IBM, 502 .oprofile_cpu_type = "ppc64/power9", 503 .cpu_setup = __setup_cpu_power9, 504 .cpu_restore = __restore_cpu_power9, 505 .machine_check_early = __machine_check_early_realmode_p9, 506 .platform = "power9", 507 }, 508 { /* Power9 DD2.3 or later */ 509 .pvr_mask = 0xffff0000, 510 .pvr_value = 0x004e0000, 511 .cpu_name = "POWER9 (raw)", 512 .cpu_features = CPU_FTRS_POWER9_DD2_3, 513 .cpu_user_features = COMMON_USER_POWER9, 514 .cpu_user_features2 = COMMON_USER2_POWER9, 515 .mmu_features = MMU_FTRS_POWER9, 516 .icache_bsize = 128, 517 .dcache_bsize = 128, 518 .num_pmcs = 6, 519 .pmc_type = PPC_PMC_IBM, 520 .oprofile_cpu_type = "ppc64/power9", 521 .cpu_setup = __setup_cpu_power9, 522 .cpu_restore = __restore_cpu_power9, 523 .machine_check_early = __machine_check_early_realmode_p9, 524 .platform = "power9", 525 }, 526 { /* Power10 */ 527 .pvr_mask = 0xffff0000, 528 .pvr_value = 0x00800000, 529 .cpu_name = "POWER10 (raw)", 530 .cpu_features = CPU_FTRS_POWER10, 531 .cpu_user_features = COMMON_USER_POWER10, 532 .cpu_user_features2 = COMMON_USER2_POWER10, 533 .mmu_features = MMU_FTRS_POWER10, 534 .icache_bsize = 128, 535 .dcache_bsize = 128, 536 .num_pmcs = 6, 537 .pmc_type = PPC_PMC_IBM, 538 .oprofile_cpu_type = "ppc64/power10", 539 .cpu_setup = __setup_cpu_power10, 540 .cpu_restore = __restore_cpu_power10, 541 .machine_check_early = __machine_check_early_realmode_p10, 542 .platform = "power10", 543 }, 544 { /* Cell Broadband Engine */ 545 .pvr_mask = 0xffff0000, 546 .pvr_value = 0x00700000, 547 .cpu_name = "Cell Broadband Engine", 548 .cpu_features = CPU_FTRS_CELL, 549 .cpu_user_features = COMMON_USER_PPC64 | 550 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP | 551 PPC_FEATURE_SMT, 552 .mmu_features = MMU_FTRS_CELL, 553 .icache_bsize = 128, 554 .dcache_bsize = 128, 555 .num_pmcs = 4, 556 .pmc_type = PPC_PMC_IBM, 557 .oprofile_cpu_type = "ppc64/cell-be", 558 .platform = "ppc-cell-be", 559 }, 560 { /* PA Semi PA6T */ 561 .pvr_mask = 0x7fff0000, 562 .pvr_value = 0x00900000, 563 .cpu_name = "PA6T", 564 .cpu_features = CPU_FTRS_PA6T, 565 .cpu_user_features = COMMON_USER_PA6T, 566 .mmu_features = MMU_FTRS_PA6T, 567 .icache_bsize = 64, 568 .dcache_bsize = 64, 569 .num_pmcs = 6, 570 .pmc_type = PPC_PMC_PA6T, 571 .cpu_setup = __setup_cpu_pa6t, 572 .cpu_restore = __restore_cpu_pa6t, 573 .oprofile_cpu_type = "ppc64/pa6t", 574 .platform = "pa6t", 575 }, 576 { /* default match */ 577 .pvr_mask = 0x00000000, 578 .pvr_value = 0x00000000, 579 .cpu_name = "POWER5 (compatible)", 580 .cpu_features = CPU_FTRS_COMPATIBLE, 581 .cpu_user_features = COMMON_USER_PPC64, 582 .mmu_features = MMU_FTRS_POWER, 583 .icache_bsize = 128, 584 .dcache_bsize = 128, 585 .num_pmcs = 6, 586 .pmc_type = PPC_PMC_IBM, 587 .platform = "power5", 588 } 589#endif /* CONFIG_PPC_BOOK3S_64 */ 590 591#ifdef CONFIG_PPC32 592#ifdef CONFIG_PPC_BOOK3S_32 593#ifdef CONFIG_PPC_BOOK3S_604 594 { /* 604 */ 595 .pvr_mask = 0xffff0000, 596 .pvr_value = 0x00040000, 597 .cpu_name = "604", 598 .cpu_features = CPU_FTRS_604, 599 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 600 .mmu_features = MMU_FTR_HPTE_TABLE, 601 .icache_bsize = 32, 602 .dcache_bsize = 32, 603 .num_pmcs = 2, 604 .cpu_setup = __setup_cpu_604, 605 .machine_check = machine_check_generic, 606 .platform = "ppc604", 607 }, 608 { /* 604e */ 609 .pvr_mask = 0xfffff000, 610 .pvr_value = 0x00090000, 611 .cpu_name = "604e", 612 .cpu_features = CPU_FTRS_604, 613 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 614 .mmu_features = MMU_FTR_HPTE_TABLE, 615 .icache_bsize = 32, 616 .dcache_bsize = 32, 617 .num_pmcs = 4, 618 .cpu_setup = __setup_cpu_604, 619 .machine_check = machine_check_generic, 620 .platform = "ppc604", 621 }, 622 { /* 604r */ 623 .pvr_mask = 0xffff0000, 624 .pvr_value = 0x00090000, 625 .cpu_name = "604r", 626 .cpu_features = CPU_FTRS_604, 627 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 628 .mmu_features = MMU_FTR_HPTE_TABLE, 629 .icache_bsize = 32, 630 .dcache_bsize = 32, 631 .num_pmcs = 4, 632 .cpu_setup = __setup_cpu_604, 633 .machine_check = machine_check_generic, 634 .platform = "ppc604", 635 }, 636 { /* 604ev */ 637 .pvr_mask = 0xffff0000, 638 .pvr_value = 0x000a0000, 639 .cpu_name = "604ev", 640 .cpu_features = CPU_FTRS_604, 641 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 642 .mmu_features = MMU_FTR_HPTE_TABLE, 643 .icache_bsize = 32, 644 .dcache_bsize = 32, 645 .num_pmcs = 4, 646 .cpu_setup = __setup_cpu_604, 647 .machine_check = machine_check_generic, 648 .platform = "ppc604", 649 }, 650 { /* 740/750 (0x4202, don't support TAU ?) */ 651 .pvr_mask = 0xffffffff, 652 .pvr_value = 0x00084202, 653 .cpu_name = "740/750", 654 .cpu_features = CPU_FTRS_740_NOTAU, 655 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 656 .mmu_features = MMU_FTR_HPTE_TABLE, 657 .icache_bsize = 32, 658 .dcache_bsize = 32, 659 .num_pmcs = 4, 660 .cpu_setup = __setup_cpu_750, 661 .machine_check = machine_check_generic, 662 .platform = "ppc750", 663 }, 664 { /* 750CX (80100 and 8010x?) */ 665 .pvr_mask = 0xfffffff0, 666 .pvr_value = 0x00080100, 667 .cpu_name = "750CX", 668 .cpu_features = CPU_FTRS_750, 669 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 670 .mmu_features = MMU_FTR_HPTE_TABLE, 671 .icache_bsize = 32, 672 .dcache_bsize = 32, 673 .num_pmcs = 4, 674 .cpu_setup = __setup_cpu_750cx, 675 .machine_check = machine_check_generic, 676 .platform = "ppc750", 677 }, 678 { /* 750CX (82201 and 82202) */ 679 .pvr_mask = 0xfffffff0, 680 .pvr_value = 0x00082200, 681 .cpu_name = "750CX", 682 .cpu_features = CPU_FTRS_750, 683 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 684 .mmu_features = MMU_FTR_HPTE_TABLE, 685 .icache_bsize = 32, 686 .dcache_bsize = 32, 687 .num_pmcs = 4, 688 .pmc_type = PPC_PMC_IBM, 689 .cpu_setup = __setup_cpu_750cx, 690 .machine_check = machine_check_generic, 691 .platform = "ppc750", 692 }, 693 { /* 750CXe (82214) */ 694 .pvr_mask = 0xfffffff0, 695 .pvr_value = 0x00082210, 696 .cpu_name = "750CXe", 697 .cpu_features = CPU_FTRS_750, 698 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 699 .mmu_features = MMU_FTR_HPTE_TABLE, 700 .icache_bsize = 32, 701 .dcache_bsize = 32, 702 .num_pmcs = 4, 703 .pmc_type = PPC_PMC_IBM, 704 .cpu_setup = __setup_cpu_750cx, 705 .machine_check = machine_check_generic, 706 .platform = "ppc750", 707 }, 708 { /* 750CXe "Gekko" (83214) */ 709 .pvr_mask = 0xffffffff, 710 .pvr_value = 0x00083214, 711 .cpu_name = "750CXe", 712 .cpu_features = CPU_FTRS_750, 713 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 714 .mmu_features = MMU_FTR_HPTE_TABLE, 715 .icache_bsize = 32, 716 .dcache_bsize = 32, 717 .num_pmcs = 4, 718 .pmc_type = PPC_PMC_IBM, 719 .cpu_setup = __setup_cpu_750cx, 720 .machine_check = machine_check_generic, 721 .platform = "ppc750", 722 }, 723 { /* 750CL (and "Broadway") */ 724 .pvr_mask = 0xfffff0e0, 725 .pvr_value = 0x00087000, 726 .cpu_name = "750CL", 727 .cpu_features = CPU_FTRS_750CL, 728 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 729 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 730 .icache_bsize = 32, 731 .dcache_bsize = 32, 732 .num_pmcs = 4, 733 .pmc_type = PPC_PMC_IBM, 734 .cpu_setup = __setup_cpu_750, 735 .machine_check = machine_check_generic, 736 .platform = "ppc750", 737 .oprofile_cpu_type = "ppc/750", 738 }, 739 { /* 745/755 */ 740 .pvr_mask = 0xfffff000, 741 .pvr_value = 0x00083000, 742 .cpu_name = "745/755", 743 .cpu_features = CPU_FTRS_750, 744 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 745 .mmu_features = MMU_FTR_HPTE_TABLE, 746 .icache_bsize = 32, 747 .dcache_bsize = 32, 748 .num_pmcs = 4, 749 .pmc_type = PPC_PMC_IBM, 750 .cpu_setup = __setup_cpu_750, 751 .machine_check = machine_check_generic, 752 .platform = "ppc750", 753 }, 754 { /* 750FX rev 1.x */ 755 .pvr_mask = 0xffffff00, 756 .pvr_value = 0x70000100, 757 .cpu_name = "750FX", 758 .cpu_features = CPU_FTRS_750FX1, 759 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 760 .mmu_features = MMU_FTR_HPTE_TABLE, 761 .icache_bsize = 32, 762 .dcache_bsize = 32, 763 .num_pmcs = 4, 764 .pmc_type = PPC_PMC_IBM, 765 .cpu_setup = __setup_cpu_750, 766 .machine_check = machine_check_generic, 767 .platform = "ppc750", 768 .oprofile_cpu_type = "ppc/750", 769 }, 770 { /* 750FX rev 2.0 must disable HID0[DPM] */ 771 .pvr_mask = 0xffffffff, 772 .pvr_value = 0x70000200, 773 .cpu_name = "750FX", 774 .cpu_features = CPU_FTRS_750FX2, 775 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 776 .mmu_features = MMU_FTR_HPTE_TABLE, 777 .icache_bsize = 32, 778 .dcache_bsize = 32, 779 .num_pmcs = 4, 780 .pmc_type = PPC_PMC_IBM, 781 .cpu_setup = __setup_cpu_750, 782 .machine_check = machine_check_generic, 783 .platform = "ppc750", 784 .oprofile_cpu_type = "ppc/750", 785 }, 786 { /* 750FX (All revs except 2.0) */ 787 .pvr_mask = 0xffff0000, 788 .pvr_value = 0x70000000, 789 .cpu_name = "750FX", 790 .cpu_features = CPU_FTRS_750FX, 791 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 792 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 793 .icache_bsize = 32, 794 .dcache_bsize = 32, 795 .num_pmcs = 4, 796 .pmc_type = PPC_PMC_IBM, 797 .cpu_setup = __setup_cpu_750fx, 798 .machine_check = machine_check_generic, 799 .platform = "ppc750", 800 .oprofile_cpu_type = "ppc/750", 801 }, 802 { /* 750GX */ 803 .pvr_mask = 0xffff0000, 804 .pvr_value = 0x70020000, 805 .cpu_name = "750GX", 806 .cpu_features = CPU_FTRS_750GX, 807 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 808 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 809 .icache_bsize = 32, 810 .dcache_bsize = 32, 811 .num_pmcs = 4, 812 .pmc_type = PPC_PMC_IBM, 813 .cpu_setup = __setup_cpu_750fx, 814 .machine_check = machine_check_generic, 815 .platform = "ppc750", 816 .oprofile_cpu_type = "ppc/750", 817 }, 818 { /* 740/750 (L2CR bit need fixup for 740) */ 819 .pvr_mask = 0xffff0000, 820 .pvr_value = 0x00080000, 821 .cpu_name = "740/750", 822 .cpu_features = CPU_FTRS_740, 823 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 824 .mmu_features = MMU_FTR_HPTE_TABLE, 825 .icache_bsize = 32, 826 .dcache_bsize = 32, 827 .num_pmcs = 4, 828 .pmc_type = PPC_PMC_IBM, 829 .cpu_setup = __setup_cpu_750, 830 .machine_check = machine_check_generic, 831 .platform = "ppc750", 832 }, 833 { /* 7400 rev 1.1 ? (no TAU) */ 834 .pvr_mask = 0xffffffff, 835 .pvr_value = 0x000c1101, 836 .cpu_name = "7400 (1.1)", 837 .cpu_features = CPU_FTRS_7400_NOTAU, 838 .cpu_user_features = COMMON_USER | 839 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 840 .mmu_features = MMU_FTR_HPTE_TABLE, 841 .icache_bsize = 32, 842 .dcache_bsize = 32, 843 .num_pmcs = 4, 844 .pmc_type = PPC_PMC_G4, 845 .cpu_setup = __setup_cpu_7400, 846 .machine_check = machine_check_generic, 847 .platform = "ppc7400", 848 }, 849 { /* 7400 */ 850 .pvr_mask = 0xffff0000, 851 .pvr_value = 0x000c0000, 852 .cpu_name = "7400", 853 .cpu_features = CPU_FTRS_7400, 854 .cpu_user_features = COMMON_USER | 855 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 856 .mmu_features = MMU_FTR_HPTE_TABLE, 857 .icache_bsize = 32, 858 .dcache_bsize = 32, 859 .num_pmcs = 4, 860 .pmc_type = PPC_PMC_G4, 861 .cpu_setup = __setup_cpu_7400, 862 .machine_check = machine_check_generic, 863 .platform = "ppc7400", 864 }, 865 { /* 7410 */ 866 .pvr_mask = 0xffff0000, 867 .pvr_value = 0x800c0000, 868 .cpu_name = "7410", 869 .cpu_features = CPU_FTRS_7400, 870 .cpu_user_features = COMMON_USER | 871 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 872 .mmu_features = MMU_FTR_HPTE_TABLE, 873 .icache_bsize = 32, 874 .dcache_bsize = 32, 875 .num_pmcs = 4, 876 .pmc_type = PPC_PMC_G4, 877 .cpu_setup = __setup_cpu_7410, 878 .machine_check = machine_check_generic, 879 .platform = "ppc7400", 880 }, 881 { /* 7450 2.0 - no doze/nap */ 882 .pvr_mask = 0xffffffff, 883 .pvr_value = 0x80000200, 884 .cpu_name = "7450", 885 .cpu_features = CPU_FTRS_7450_20, 886 .cpu_user_features = COMMON_USER | 887 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 888 .mmu_features = MMU_FTR_HPTE_TABLE, 889 .icache_bsize = 32, 890 .dcache_bsize = 32, 891 .num_pmcs = 6, 892 .pmc_type = PPC_PMC_G4, 893 .cpu_setup = __setup_cpu_745x, 894 .oprofile_cpu_type = "ppc/7450", 895 .machine_check = machine_check_generic, 896 .platform = "ppc7450", 897 }, 898 { /* 7450 2.1 */ 899 .pvr_mask = 0xffffffff, 900 .pvr_value = 0x80000201, 901 .cpu_name = "7450", 902 .cpu_features = CPU_FTRS_7450_21, 903 .cpu_user_features = COMMON_USER | 904 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 905 .mmu_features = MMU_FTR_HPTE_TABLE, 906 .icache_bsize = 32, 907 .dcache_bsize = 32, 908 .num_pmcs = 6, 909 .pmc_type = PPC_PMC_G4, 910 .cpu_setup = __setup_cpu_745x, 911 .oprofile_cpu_type = "ppc/7450", 912 .machine_check = machine_check_generic, 913 .platform = "ppc7450", 914 }, 915 { /* 7450 2.3 and newer */ 916 .pvr_mask = 0xffff0000, 917 .pvr_value = 0x80000000, 918 .cpu_name = "7450", 919 .cpu_features = CPU_FTRS_7450_23, 920 .cpu_user_features = COMMON_USER | 921 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 922 .mmu_features = MMU_FTR_HPTE_TABLE, 923 .icache_bsize = 32, 924 .dcache_bsize = 32, 925 .num_pmcs = 6, 926 .pmc_type = PPC_PMC_G4, 927 .cpu_setup = __setup_cpu_745x, 928 .oprofile_cpu_type = "ppc/7450", 929 .machine_check = machine_check_generic, 930 .platform = "ppc7450", 931 }, 932 { /* 7455 rev 1.x */ 933 .pvr_mask = 0xffffff00, 934 .pvr_value = 0x80010100, 935 .cpu_name = "7455", 936 .cpu_features = CPU_FTRS_7455_1, 937 .cpu_user_features = COMMON_USER | 938 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 939 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 940 .icache_bsize = 32, 941 .dcache_bsize = 32, 942 .num_pmcs = 6, 943 .pmc_type = PPC_PMC_G4, 944 .cpu_setup = __setup_cpu_745x, 945 .oprofile_cpu_type = "ppc/7450", 946 .machine_check = machine_check_generic, 947 .platform = "ppc7450", 948 }, 949 { /* 7455 rev 2.0 */ 950 .pvr_mask = 0xffffffff, 951 .pvr_value = 0x80010200, 952 .cpu_name = "7455", 953 .cpu_features = CPU_FTRS_7455_20, 954 .cpu_user_features = COMMON_USER | 955 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 956 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 957 .icache_bsize = 32, 958 .dcache_bsize = 32, 959 .num_pmcs = 6, 960 .pmc_type = PPC_PMC_G4, 961 .cpu_setup = __setup_cpu_745x, 962 .oprofile_cpu_type = "ppc/7450", 963 .machine_check = machine_check_generic, 964 .platform = "ppc7450", 965 }, 966 { /* 7455 others */ 967 .pvr_mask = 0xffff0000, 968 .pvr_value = 0x80010000, 969 .cpu_name = "7455", 970 .cpu_features = CPU_FTRS_7455, 971 .cpu_user_features = COMMON_USER | 972 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 973 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 974 .icache_bsize = 32, 975 .dcache_bsize = 32, 976 .num_pmcs = 6, 977 .pmc_type = PPC_PMC_G4, 978 .cpu_setup = __setup_cpu_745x, 979 .oprofile_cpu_type = "ppc/7450", 980 .machine_check = machine_check_generic, 981 .platform = "ppc7450", 982 }, 983 { /* 7447/7457 Rev 1.0 */ 984 .pvr_mask = 0xffffffff, 985 .pvr_value = 0x80020100, 986 .cpu_name = "7447/7457", 987 .cpu_features = CPU_FTRS_7447_10, 988 .cpu_user_features = COMMON_USER | 989 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 990 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 991 .icache_bsize = 32, 992 .dcache_bsize = 32, 993 .num_pmcs = 6, 994 .pmc_type = PPC_PMC_G4, 995 .cpu_setup = __setup_cpu_745x, 996 .oprofile_cpu_type = "ppc/7450", 997 .machine_check = machine_check_generic, 998 .platform = "ppc7450", 999 }, 1000 { /* 7447/7457 Rev 1.1 */ 1001 .pvr_mask = 0xffffffff, 1002 .pvr_value = 0x80020101, 1003 .cpu_name = "7447/7457", 1004 .cpu_features = CPU_FTRS_7447_10, 1005 .cpu_user_features = COMMON_USER | 1006 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1007 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1008 .icache_bsize = 32, 1009 .dcache_bsize = 32, 1010 .num_pmcs = 6, 1011 .pmc_type = PPC_PMC_G4, 1012 .cpu_setup = __setup_cpu_745x, 1013 .oprofile_cpu_type = "ppc/7450", 1014 .machine_check = machine_check_generic, 1015 .platform = "ppc7450", 1016 }, 1017 { /* 7447/7457 Rev 1.2 and later */ 1018 .pvr_mask = 0xffff0000, 1019 .pvr_value = 0x80020000, 1020 .cpu_name = "7447/7457", 1021 .cpu_features = CPU_FTRS_7447, 1022 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1023 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1024 .icache_bsize = 32, 1025 .dcache_bsize = 32, 1026 .num_pmcs = 6, 1027 .pmc_type = PPC_PMC_G4, 1028 .cpu_setup = __setup_cpu_745x, 1029 .oprofile_cpu_type = "ppc/7450", 1030 .machine_check = machine_check_generic, 1031 .platform = "ppc7450", 1032 }, 1033 { /* 7447A */ 1034 .pvr_mask = 0xffff0000, 1035 .pvr_value = 0x80030000, 1036 .cpu_name = "7447A", 1037 .cpu_features = CPU_FTRS_7447A, 1038 .cpu_user_features = COMMON_USER | 1039 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1040 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1041 .icache_bsize = 32, 1042 .dcache_bsize = 32, 1043 .num_pmcs = 6, 1044 .pmc_type = PPC_PMC_G4, 1045 .cpu_setup = __setup_cpu_745x, 1046 .oprofile_cpu_type = "ppc/7450", 1047 .machine_check = machine_check_generic, 1048 .platform = "ppc7450", 1049 }, 1050 { /* 7448 */ 1051 .pvr_mask = 0xffff0000, 1052 .pvr_value = 0x80040000, 1053 .cpu_name = "7448", 1054 .cpu_features = CPU_FTRS_7448, 1055 .cpu_user_features = COMMON_USER | 1056 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE, 1057 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS, 1058 .icache_bsize = 32, 1059 .dcache_bsize = 32, 1060 .num_pmcs = 6, 1061 .pmc_type = PPC_PMC_G4, 1062 .cpu_setup = __setup_cpu_745x, 1063 .oprofile_cpu_type = "ppc/7450", 1064 .machine_check = machine_check_generic, 1065 .platform = "ppc7450", 1066 }, 1067#endif /* CONFIG_PPC_BOOK3S_604 */ 1068#ifdef CONFIG_PPC_BOOK3S_603 1069 { /* 603 */ 1070 .pvr_mask = 0xffff0000, 1071 .pvr_value = 0x00030000, 1072 .cpu_name = "603", 1073 .cpu_features = CPU_FTRS_603, 1074 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 1075 .mmu_features = 0, 1076 .icache_bsize = 32, 1077 .dcache_bsize = 32, 1078 .cpu_setup = __setup_cpu_603, 1079 .machine_check = machine_check_generic, 1080 .platform = "ppc603", 1081 }, 1082 { /* 603e */ 1083 .pvr_mask = 0xffff0000, 1084 .pvr_value = 0x00060000, 1085 .cpu_name = "603e", 1086 .cpu_features = CPU_FTRS_603, 1087 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 1088 .mmu_features = 0, 1089 .icache_bsize = 32, 1090 .dcache_bsize = 32, 1091 .cpu_setup = __setup_cpu_603, 1092 .machine_check = machine_check_generic, 1093 .platform = "ppc603", 1094 }, 1095 { /* 603ev */ 1096 .pvr_mask = 0xffff0000, 1097 .pvr_value = 0x00070000, 1098 .cpu_name = "603ev", 1099 .cpu_features = CPU_FTRS_603, 1100 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE, 1101 .mmu_features = 0, 1102 .icache_bsize = 32, 1103 .dcache_bsize = 32, 1104 .cpu_setup = __setup_cpu_603, 1105 .machine_check = machine_check_generic, 1106 .platform = "ppc603", 1107 }, 1108 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 1109 .pvr_mask = 0x7fff0000, 1110 .pvr_value = 0x00810000, 1111 .cpu_name = "82xx", 1112 .cpu_features = CPU_FTRS_82XX, 1113 .cpu_user_features = COMMON_USER, 1114 .mmu_features = 0, 1115 .icache_bsize = 32, 1116 .dcache_bsize = 32, 1117 .cpu_setup = __setup_cpu_603, 1118 .machine_check = machine_check_generic, 1119 .platform = "ppc603", 1120 }, 1121 { /* All G2_LE (603e core, plus some) have the same pvr */ 1122 .pvr_mask = 0x7fff0000, 1123 .pvr_value = 0x00820000, 1124 .cpu_name = "G2_LE", 1125 .cpu_features = CPU_FTRS_G2_LE, 1126 .cpu_user_features = COMMON_USER, 1127 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1128 .icache_bsize = 32, 1129 .dcache_bsize = 32, 1130 .cpu_setup = __setup_cpu_603, 1131 .machine_check = machine_check_generic, 1132 .platform = "ppc603", 1133 }, 1134#ifdef CONFIG_PPC_83xx 1135 { /* e300c1 (a 603e core, plus some) on 83xx */ 1136 .pvr_mask = 0x7fff0000, 1137 .pvr_value = 0x00830000, 1138 .cpu_name = "e300c1", 1139 .cpu_features = CPU_FTRS_E300, 1140 .cpu_user_features = COMMON_USER, 1141 .mmu_features = MMU_FTR_USE_HIGH_BATS, 1142 .icache_bsize = 32, 1143 .dcache_bsize = 32, 1144 .cpu_setup = __setup_cpu_603, 1145 .machine_check = machine_check_83xx, 1146 .platform = "ppc603", 1147 }, 1148 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */ 1149 .pvr_mask = 0x7fff0000, 1150 .pvr_value = 0x00840000, 1151 .cpu_name = "e300c2", 1152 .cpu_features = CPU_FTRS_E300C2, 1153 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1154 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1155 MMU_FTR_NEED_DTLB_SW_LRU, 1156 .icache_bsize = 32, 1157 .dcache_bsize = 32, 1158 .cpu_setup = __setup_cpu_603, 1159 .machine_check = machine_check_83xx, 1160 .platform = "ppc603", 1161 }, 1162 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */ 1163 .pvr_mask = 0x7fff0000, 1164 .pvr_value = 0x00850000, 1165 .cpu_name = "e300c3", 1166 .cpu_features = CPU_FTRS_E300, 1167 .cpu_user_features = COMMON_USER, 1168 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1169 MMU_FTR_NEED_DTLB_SW_LRU, 1170 .icache_bsize = 32, 1171 .dcache_bsize = 32, 1172 .cpu_setup = __setup_cpu_603, 1173 .machine_check = machine_check_83xx, 1174 .num_pmcs = 4, 1175 .oprofile_cpu_type = "ppc/e300", 1176 .platform = "ppc603", 1177 }, 1178 { /* e300c4 (e300c1, plus one IU) */ 1179 .pvr_mask = 0x7fff0000, 1180 .pvr_value = 0x00860000, 1181 .cpu_name = "e300c4", 1182 .cpu_features = CPU_FTRS_E300, 1183 .cpu_user_features = COMMON_USER, 1184 .mmu_features = MMU_FTR_USE_HIGH_BATS | 1185 MMU_FTR_NEED_DTLB_SW_LRU, 1186 .icache_bsize = 32, 1187 .dcache_bsize = 32, 1188 .cpu_setup = __setup_cpu_603, 1189 .machine_check = machine_check_83xx, 1190 .num_pmcs = 4, 1191 .oprofile_cpu_type = "ppc/e300", 1192 .platform = "ppc603", 1193 }, 1194#endif 1195#endif /* CONFIG_PPC_BOOK3S_603 */ 1196#ifdef CONFIG_PPC_BOOK3S_604 1197 { /* default match, we assume split I/D cache & TB (non-601)... */ 1198 .pvr_mask = 0x00000000, 1199 .pvr_value = 0x00000000, 1200 .cpu_name = "(generic PPC)", 1201 .cpu_features = CPU_FTRS_CLASSIC32, 1202 .cpu_user_features = COMMON_USER, 1203 .mmu_features = MMU_FTR_HPTE_TABLE, 1204 .icache_bsize = 32, 1205 .dcache_bsize = 32, 1206 .machine_check = machine_check_generic, 1207 .platform = "ppc603", 1208 }, 1209#endif /* CONFIG_PPC_BOOK3S_604 */ 1210#endif /* CONFIG_PPC_BOOK3S_32 */ 1211#ifdef CONFIG_PPC_8xx 1212 { /* 8xx */ 1213 .pvr_mask = 0xffff0000, 1214 .pvr_value = PVR_8xx, 1215 .cpu_name = "8xx", 1216 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 1217 * if the 8xx code is there.... */ 1218 .cpu_features = CPU_FTRS_8XX, 1219 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1220 .mmu_features = MMU_FTR_TYPE_8xx, 1221 .icache_bsize = 16, 1222 .dcache_bsize = 16, 1223 .machine_check = machine_check_8xx, 1224 .platform = "ppc823", 1225 }, 1226#endif /* CONFIG_PPC_8xx */ 1227#ifdef CONFIG_40x 1228 { /* STB 04xxx */ 1229 .pvr_mask = 0xffff0000, 1230 .pvr_value = 0x41810000, 1231 .cpu_name = "STB04xxx", 1232 .cpu_features = CPU_FTRS_40X, 1233 .cpu_user_features = PPC_FEATURE_32 | 1234 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1235 .mmu_features = MMU_FTR_TYPE_40x, 1236 .icache_bsize = 32, 1237 .dcache_bsize = 32, 1238 .machine_check = machine_check_4xx, 1239 .platform = "ppc405", 1240 }, 1241 { /* NP405L */ 1242 .pvr_mask = 0xffff0000, 1243 .pvr_value = 0x41610000, 1244 .cpu_name = "NP405L", 1245 .cpu_features = CPU_FTRS_40X, 1246 .cpu_user_features = PPC_FEATURE_32 | 1247 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1248 .mmu_features = MMU_FTR_TYPE_40x, 1249 .icache_bsize = 32, 1250 .dcache_bsize = 32, 1251 .machine_check = machine_check_4xx, 1252 .platform = "ppc405", 1253 }, 1254 { /* NP4GS3 */ 1255 .pvr_mask = 0xffff0000, 1256 .pvr_value = 0x40B10000, 1257 .cpu_name = "NP4GS3", 1258 .cpu_features = CPU_FTRS_40X, 1259 .cpu_user_features = PPC_FEATURE_32 | 1260 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1261 .mmu_features = MMU_FTR_TYPE_40x, 1262 .icache_bsize = 32, 1263 .dcache_bsize = 32, 1264 .machine_check = machine_check_4xx, 1265 .platform = "ppc405", 1266 }, 1267 { /* NP405H */ 1268 .pvr_mask = 0xffff0000, 1269 .pvr_value = 0x41410000, 1270 .cpu_name = "NP405H", 1271 .cpu_features = CPU_FTRS_40X, 1272 .cpu_user_features = PPC_FEATURE_32 | 1273 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1274 .mmu_features = MMU_FTR_TYPE_40x, 1275 .icache_bsize = 32, 1276 .dcache_bsize = 32, 1277 .machine_check = machine_check_4xx, 1278 .platform = "ppc405", 1279 }, 1280 { /* 405GPr */ 1281 .pvr_mask = 0xffff0000, 1282 .pvr_value = 0x50910000, 1283 .cpu_name = "405GPr", 1284 .cpu_features = CPU_FTRS_40X, 1285 .cpu_user_features = PPC_FEATURE_32 | 1286 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1287 .mmu_features = MMU_FTR_TYPE_40x, 1288 .icache_bsize = 32, 1289 .dcache_bsize = 32, 1290 .machine_check = machine_check_4xx, 1291 .platform = "ppc405", 1292 }, 1293 { /* STBx25xx */ 1294 .pvr_mask = 0xffff0000, 1295 .pvr_value = 0x51510000, 1296 .cpu_name = "STBx25xx", 1297 .cpu_features = CPU_FTRS_40X, 1298 .cpu_user_features = PPC_FEATURE_32 | 1299 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1300 .mmu_features = MMU_FTR_TYPE_40x, 1301 .icache_bsize = 32, 1302 .dcache_bsize = 32, 1303 .machine_check = machine_check_4xx, 1304 .platform = "ppc405", 1305 }, 1306 { /* 405LP */ 1307 .pvr_mask = 0xffff0000, 1308 .pvr_value = 0x41F10000, 1309 .cpu_name = "405LP", 1310 .cpu_features = CPU_FTRS_40X, 1311 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 1312 .mmu_features = MMU_FTR_TYPE_40x, 1313 .icache_bsize = 32, 1314 .dcache_bsize = 32, 1315 .machine_check = machine_check_4xx, 1316 .platform = "ppc405", 1317 }, 1318 { /* 405EP */ 1319 .pvr_mask = 0xffff0000, 1320 .pvr_value = 0x51210000, 1321 .cpu_name = "405EP", 1322 .cpu_features = CPU_FTRS_40X, 1323 .cpu_user_features = PPC_FEATURE_32 | 1324 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1325 .mmu_features = MMU_FTR_TYPE_40x, 1326 .icache_bsize = 32, 1327 .dcache_bsize = 32, 1328 .machine_check = machine_check_4xx, 1329 .platform = "ppc405", 1330 }, 1331 { /* 405EX Rev. A/B with Security */ 1332 .pvr_mask = 0xffff000f, 1333 .pvr_value = 0x12910007, 1334 .cpu_name = "405EX Rev. A/B", 1335 .cpu_features = CPU_FTRS_40X, 1336 .cpu_user_features = PPC_FEATURE_32 | 1337 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1338 .mmu_features = MMU_FTR_TYPE_40x, 1339 .icache_bsize = 32, 1340 .dcache_bsize = 32, 1341 .machine_check = machine_check_4xx, 1342 .platform = "ppc405", 1343 }, 1344 { /* 405EX Rev. C without Security */ 1345 .pvr_mask = 0xffff000f, 1346 .pvr_value = 0x1291000d, 1347 .cpu_name = "405EX Rev. C", 1348 .cpu_features = CPU_FTRS_40X, 1349 .cpu_user_features = PPC_FEATURE_32 | 1350 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1351 .mmu_features = MMU_FTR_TYPE_40x, 1352 .icache_bsize = 32, 1353 .dcache_bsize = 32, 1354 .machine_check = machine_check_4xx, 1355 .platform = "ppc405", 1356 }, 1357 { /* 405EX Rev. C with Security */ 1358 .pvr_mask = 0xffff000f, 1359 .pvr_value = 0x1291000f, 1360 .cpu_name = "405EX Rev. C", 1361 .cpu_features = CPU_FTRS_40X, 1362 .cpu_user_features = PPC_FEATURE_32 | 1363 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1364 .mmu_features = MMU_FTR_TYPE_40x, 1365 .icache_bsize = 32, 1366 .dcache_bsize = 32, 1367 .machine_check = machine_check_4xx, 1368 .platform = "ppc405", 1369 }, 1370 { /* 405EX Rev. D without Security */ 1371 .pvr_mask = 0xffff000f, 1372 .pvr_value = 0x12910003, 1373 .cpu_name = "405EX Rev. D", 1374 .cpu_features = CPU_FTRS_40X, 1375 .cpu_user_features = PPC_FEATURE_32 | 1376 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1377 .mmu_features = MMU_FTR_TYPE_40x, 1378 .icache_bsize = 32, 1379 .dcache_bsize = 32, 1380 .machine_check = machine_check_4xx, 1381 .platform = "ppc405", 1382 }, 1383 { /* 405EX Rev. D with Security */ 1384 .pvr_mask = 0xffff000f, 1385 .pvr_value = 0x12910005, 1386 .cpu_name = "405EX Rev. D", 1387 .cpu_features = CPU_FTRS_40X, 1388 .cpu_user_features = PPC_FEATURE_32 | 1389 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1390 .mmu_features = MMU_FTR_TYPE_40x, 1391 .icache_bsize = 32, 1392 .dcache_bsize = 32, 1393 .machine_check = machine_check_4xx, 1394 .platform = "ppc405", 1395 }, 1396 { /* 405EXr Rev. A/B without Security */ 1397 .pvr_mask = 0xffff000f, 1398 .pvr_value = 0x12910001, 1399 .cpu_name = "405EXr Rev. A/B", 1400 .cpu_features = CPU_FTRS_40X, 1401 .cpu_user_features = PPC_FEATURE_32 | 1402 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1403 .mmu_features = MMU_FTR_TYPE_40x, 1404 .icache_bsize = 32, 1405 .dcache_bsize = 32, 1406 .machine_check = machine_check_4xx, 1407 .platform = "ppc405", 1408 }, 1409 { /* 405EXr Rev. C without Security */ 1410 .pvr_mask = 0xffff000f, 1411 .pvr_value = 0x12910009, 1412 .cpu_name = "405EXr Rev. C", 1413 .cpu_features = CPU_FTRS_40X, 1414 .cpu_user_features = PPC_FEATURE_32 | 1415 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1416 .mmu_features = MMU_FTR_TYPE_40x, 1417 .icache_bsize = 32, 1418 .dcache_bsize = 32, 1419 .machine_check = machine_check_4xx, 1420 .platform = "ppc405", 1421 }, 1422 { /* 405EXr Rev. C with Security */ 1423 .pvr_mask = 0xffff000f, 1424 .pvr_value = 0x1291000b, 1425 .cpu_name = "405EXr Rev. C", 1426 .cpu_features = CPU_FTRS_40X, 1427 .cpu_user_features = PPC_FEATURE_32 | 1428 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1429 .mmu_features = MMU_FTR_TYPE_40x, 1430 .icache_bsize = 32, 1431 .dcache_bsize = 32, 1432 .machine_check = machine_check_4xx, 1433 .platform = "ppc405", 1434 }, 1435 { /* 405EXr Rev. D without Security */ 1436 .pvr_mask = 0xffff000f, 1437 .pvr_value = 0x12910000, 1438 .cpu_name = "405EXr Rev. D", 1439 .cpu_features = CPU_FTRS_40X, 1440 .cpu_user_features = PPC_FEATURE_32 | 1441 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1442 .mmu_features = MMU_FTR_TYPE_40x, 1443 .icache_bsize = 32, 1444 .dcache_bsize = 32, 1445 .machine_check = machine_check_4xx, 1446 .platform = "ppc405", 1447 }, 1448 { /* 405EXr Rev. D with Security */ 1449 .pvr_mask = 0xffff000f, 1450 .pvr_value = 0x12910002, 1451 .cpu_name = "405EXr Rev. D", 1452 .cpu_features = CPU_FTRS_40X, 1453 .cpu_user_features = PPC_FEATURE_32 | 1454 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1455 .mmu_features = MMU_FTR_TYPE_40x, 1456 .icache_bsize = 32, 1457 .dcache_bsize = 32, 1458 .machine_check = machine_check_4xx, 1459 .platform = "ppc405", 1460 }, 1461 { 1462 /* 405EZ */ 1463 .pvr_mask = 0xffff0000, 1464 .pvr_value = 0x41510000, 1465 .cpu_name = "405EZ", 1466 .cpu_features = CPU_FTRS_40X, 1467 .cpu_user_features = PPC_FEATURE_32 | 1468 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1469 .mmu_features = MMU_FTR_TYPE_40x, 1470 .icache_bsize = 32, 1471 .dcache_bsize = 32, 1472 .machine_check = machine_check_4xx, 1473 .platform = "ppc405", 1474 }, 1475 { /* APM8018X */ 1476 .pvr_mask = 0xffff0000, 1477 .pvr_value = 0x7ff11432, 1478 .cpu_name = "APM8018X", 1479 .cpu_features = CPU_FTRS_40X, 1480 .cpu_user_features = PPC_FEATURE_32 | 1481 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1482 .mmu_features = MMU_FTR_TYPE_40x, 1483 .icache_bsize = 32, 1484 .dcache_bsize = 32, 1485 .machine_check = machine_check_4xx, 1486 .platform = "ppc405", 1487 }, 1488 { /* default match */ 1489 .pvr_mask = 0x00000000, 1490 .pvr_value = 0x00000000, 1491 .cpu_name = "(generic 40x PPC)", 1492 .cpu_features = CPU_FTRS_40X, 1493 .cpu_user_features = PPC_FEATURE_32 | 1494 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 1495 .mmu_features = MMU_FTR_TYPE_40x, 1496 .icache_bsize = 32, 1497 .dcache_bsize = 32, 1498 .machine_check = machine_check_4xx, 1499 .platform = "ppc405", 1500 } 1501 1502#endif /* CONFIG_40x */ 1503#ifdef CONFIG_44x 1504#ifndef CONFIG_PPC_47x 1505 { 1506 .pvr_mask = 0xf0000fff, 1507 .pvr_value = 0x40000850, 1508 .cpu_name = "440GR Rev. A", 1509 .cpu_features = CPU_FTRS_44X, 1510 .cpu_user_features = COMMON_USER_BOOKE, 1511 .mmu_features = MMU_FTR_TYPE_44x, 1512 .icache_bsize = 32, 1513 .dcache_bsize = 32, 1514 .machine_check = machine_check_4xx, 1515 .platform = "ppc440", 1516 }, 1517 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1518 .pvr_mask = 0xf0000fff, 1519 .pvr_value = 0x40000858, 1520 .cpu_name = "440EP Rev. A", 1521 .cpu_features = CPU_FTRS_44X, 1522 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1523 .mmu_features = MMU_FTR_TYPE_44x, 1524 .icache_bsize = 32, 1525 .dcache_bsize = 32, 1526 .cpu_setup = __setup_cpu_440ep, 1527 .machine_check = machine_check_4xx, 1528 .platform = "ppc440", 1529 }, 1530 { 1531 .pvr_mask = 0xf0000fff, 1532 .pvr_value = 0x400008d3, 1533 .cpu_name = "440GR Rev. B", 1534 .cpu_features = CPU_FTRS_44X, 1535 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1536 .mmu_features = MMU_FTR_TYPE_44x, 1537 .icache_bsize = 32, 1538 .dcache_bsize = 32, 1539 .machine_check = machine_check_4xx, 1540 .platform = "ppc440", 1541 }, 1542 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1543 .pvr_mask = 0xf0000ff7, 1544 .pvr_value = 0x400008d4, 1545 .cpu_name = "440EP Rev. C", 1546 .cpu_features = CPU_FTRS_44X, 1547 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1548 .mmu_features = MMU_FTR_TYPE_44x, 1549 .icache_bsize = 32, 1550 .dcache_bsize = 32, 1551 .cpu_setup = __setup_cpu_440ep, 1552 .machine_check = machine_check_4xx, 1553 .platform = "ppc440", 1554 }, 1555 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */ 1556 .pvr_mask = 0xf0000fff, 1557 .pvr_value = 0x400008db, 1558 .cpu_name = "440EP Rev. B", 1559 .cpu_features = CPU_FTRS_44X, 1560 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1561 .mmu_features = MMU_FTR_TYPE_44x, 1562 .icache_bsize = 32, 1563 .dcache_bsize = 32, 1564 .cpu_setup = __setup_cpu_440ep, 1565 .machine_check = machine_check_4xx, 1566 .platform = "ppc440", 1567 }, 1568 { /* 440GRX */ 1569 .pvr_mask = 0xf0000ffb, 1570 .pvr_value = 0x200008D0, 1571 .cpu_name = "440GRX", 1572 .cpu_features = CPU_FTRS_44X, 1573 .cpu_user_features = COMMON_USER_BOOKE, 1574 .mmu_features = MMU_FTR_TYPE_44x, 1575 .icache_bsize = 32, 1576 .dcache_bsize = 32, 1577 .cpu_setup = __setup_cpu_440grx, 1578 .machine_check = machine_check_440A, 1579 .platform = "ppc440", 1580 }, 1581 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */ 1582 .pvr_mask = 0xf0000ffb, 1583 .pvr_value = 0x200008D8, 1584 .cpu_name = "440EPX", 1585 .cpu_features = CPU_FTRS_44X, 1586 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1587 .mmu_features = MMU_FTR_TYPE_44x, 1588 .icache_bsize = 32, 1589 .dcache_bsize = 32, 1590 .cpu_setup = __setup_cpu_440epx, 1591 .machine_check = machine_check_440A, 1592 .platform = "ppc440", 1593 }, 1594 { /* 440GP Rev. B */ 1595 .pvr_mask = 0xf0000fff, 1596 .pvr_value = 0x40000440, 1597 .cpu_name = "440GP Rev. B", 1598 .cpu_features = CPU_FTRS_44X, 1599 .cpu_user_features = COMMON_USER_BOOKE, 1600 .mmu_features = MMU_FTR_TYPE_44x, 1601 .icache_bsize = 32, 1602 .dcache_bsize = 32, 1603 .machine_check = machine_check_4xx, 1604 .platform = "ppc440gp", 1605 }, 1606 { /* 440GP Rev. C */ 1607 .pvr_mask = 0xf0000fff, 1608 .pvr_value = 0x40000481, 1609 .cpu_name = "440GP Rev. C", 1610 .cpu_features = CPU_FTRS_44X, 1611 .cpu_user_features = COMMON_USER_BOOKE, 1612 .mmu_features = MMU_FTR_TYPE_44x, 1613 .icache_bsize = 32, 1614 .dcache_bsize = 32, 1615 .machine_check = machine_check_4xx, 1616 .platform = "ppc440gp", 1617 }, 1618 { /* 440GX Rev. A */ 1619 .pvr_mask = 0xf0000fff, 1620 .pvr_value = 0x50000850, 1621 .cpu_name = "440GX Rev. A", 1622 .cpu_features = CPU_FTRS_44X, 1623 .cpu_user_features = COMMON_USER_BOOKE, 1624 .mmu_features = MMU_FTR_TYPE_44x, 1625 .icache_bsize = 32, 1626 .dcache_bsize = 32, 1627 .cpu_setup = __setup_cpu_440gx, 1628 .machine_check = machine_check_440A, 1629 .platform = "ppc440", 1630 }, 1631 { /* 440GX Rev. B */ 1632 .pvr_mask = 0xf0000fff, 1633 .pvr_value = 0x50000851, 1634 .cpu_name = "440GX Rev. B", 1635 .cpu_features = CPU_FTRS_44X, 1636 .cpu_user_features = COMMON_USER_BOOKE, 1637 .mmu_features = MMU_FTR_TYPE_44x, 1638 .icache_bsize = 32, 1639 .dcache_bsize = 32, 1640 .cpu_setup = __setup_cpu_440gx, 1641 .machine_check = machine_check_440A, 1642 .platform = "ppc440", 1643 }, 1644 { /* 440GX Rev. C */ 1645 .pvr_mask = 0xf0000fff, 1646 .pvr_value = 0x50000892, 1647 .cpu_name = "440GX Rev. C", 1648 .cpu_features = CPU_FTRS_44X, 1649 .cpu_user_features = COMMON_USER_BOOKE, 1650 .mmu_features = MMU_FTR_TYPE_44x, 1651 .icache_bsize = 32, 1652 .dcache_bsize = 32, 1653 .cpu_setup = __setup_cpu_440gx, 1654 .machine_check = machine_check_440A, 1655 .platform = "ppc440", 1656 }, 1657 { /* 440GX Rev. F */ 1658 .pvr_mask = 0xf0000fff, 1659 .pvr_value = 0x50000894, 1660 .cpu_name = "440GX Rev. F", 1661 .cpu_features = CPU_FTRS_44X, 1662 .cpu_user_features = COMMON_USER_BOOKE, 1663 .mmu_features = MMU_FTR_TYPE_44x, 1664 .icache_bsize = 32, 1665 .dcache_bsize = 32, 1666 .cpu_setup = __setup_cpu_440gx, 1667 .machine_check = machine_check_440A, 1668 .platform = "ppc440", 1669 }, 1670 { /* 440SP Rev. A */ 1671 .pvr_mask = 0xfff00fff, 1672 .pvr_value = 0x53200891, 1673 .cpu_name = "440SP Rev. A", 1674 .cpu_features = CPU_FTRS_44X, 1675 .cpu_user_features = COMMON_USER_BOOKE, 1676 .mmu_features = MMU_FTR_TYPE_44x, 1677 .icache_bsize = 32, 1678 .dcache_bsize = 32, 1679 .machine_check = machine_check_4xx, 1680 .platform = "ppc440", 1681 }, 1682 { /* 440SPe Rev. A */ 1683 .pvr_mask = 0xfff00fff, 1684 .pvr_value = 0x53400890, 1685 .cpu_name = "440SPe Rev. A", 1686 .cpu_features = CPU_FTRS_44X, 1687 .cpu_user_features = COMMON_USER_BOOKE, 1688 .mmu_features = MMU_FTR_TYPE_44x, 1689 .icache_bsize = 32, 1690 .dcache_bsize = 32, 1691 .cpu_setup = __setup_cpu_440spe, 1692 .machine_check = machine_check_440A, 1693 .platform = "ppc440", 1694 }, 1695 { /* 440SPe Rev. B */ 1696 .pvr_mask = 0xfff00fff, 1697 .pvr_value = 0x53400891, 1698 .cpu_name = "440SPe Rev. B", 1699 .cpu_features = CPU_FTRS_44X, 1700 .cpu_user_features = COMMON_USER_BOOKE, 1701 .mmu_features = MMU_FTR_TYPE_44x, 1702 .icache_bsize = 32, 1703 .dcache_bsize = 32, 1704 .cpu_setup = __setup_cpu_440spe, 1705 .machine_check = machine_check_440A, 1706 .platform = "ppc440", 1707 }, 1708 { /* 460EX */ 1709 .pvr_mask = 0xffff0006, 1710 .pvr_value = 0x13020002, 1711 .cpu_name = "460EX", 1712 .cpu_features = CPU_FTRS_440x6, 1713 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1714 .mmu_features = MMU_FTR_TYPE_44x, 1715 .icache_bsize = 32, 1716 .dcache_bsize = 32, 1717 .cpu_setup = __setup_cpu_460ex, 1718 .machine_check = machine_check_440A, 1719 .platform = "ppc440", 1720 }, 1721 { /* 460EX Rev B */ 1722 .pvr_mask = 0xffff0007, 1723 .pvr_value = 0x13020004, 1724 .cpu_name = "460EX Rev. B", 1725 .cpu_features = CPU_FTRS_440x6, 1726 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1727 .mmu_features = MMU_FTR_TYPE_44x, 1728 .icache_bsize = 32, 1729 .dcache_bsize = 32, 1730 .cpu_setup = __setup_cpu_460ex, 1731 .machine_check = machine_check_440A, 1732 .platform = "ppc440", 1733 }, 1734 { /* 460GT */ 1735 .pvr_mask = 0xffff0006, 1736 .pvr_value = 0x13020000, 1737 .cpu_name = "460GT", 1738 .cpu_features = CPU_FTRS_440x6, 1739 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1740 .mmu_features = MMU_FTR_TYPE_44x, 1741 .icache_bsize = 32, 1742 .dcache_bsize = 32, 1743 .cpu_setup = __setup_cpu_460gt, 1744 .machine_check = machine_check_440A, 1745 .platform = "ppc440", 1746 }, 1747 { /* 460GT Rev B */ 1748 .pvr_mask = 0xffff0007, 1749 .pvr_value = 0x13020005, 1750 .cpu_name = "460GT Rev. B", 1751 .cpu_features = CPU_FTRS_440x6, 1752 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1753 .mmu_features = MMU_FTR_TYPE_44x, 1754 .icache_bsize = 32, 1755 .dcache_bsize = 32, 1756 .cpu_setup = __setup_cpu_460gt, 1757 .machine_check = machine_check_440A, 1758 .platform = "ppc440", 1759 }, 1760 { /* 460SX */ 1761 .pvr_mask = 0xffffff00, 1762 .pvr_value = 0x13541800, 1763 .cpu_name = "460SX", 1764 .cpu_features = CPU_FTRS_44X, 1765 .cpu_user_features = COMMON_USER_BOOKE, 1766 .mmu_features = MMU_FTR_TYPE_44x, 1767 .icache_bsize = 32, 1768 .dcache_bsize = 32, 1769 .cpu_setup = __setup_cpu_460sx, 1770 .machine_check = machine_check_440A, 1771 .platform = "ppc440", 1772 }, 1773 { /* 464 in APM821xx */ 1774 .pvr_mask = 0xfffffff0, 1775 .pvr_value = 0x12C41C80, 1776 .cpu_name = "APM821XX", 1777 .cpu_features = CPU_FTRS_44X, 1778 .cpu_user_features = COMMON_USER_BOOKE | 1779 PPC_FEATURE_HAS_FPU, 1780 .mmu_features = MMU_FTR_TYPE_44x, 1781 .icache_bsize = 32, 1782 .dcache_bsize = 32, 1783 .cpu_setup = __setup_cpu_apm821xx, 1784 .machine_check = machine_check_440A, 1785 .platform = "ppc440", 1786 }, 1787 { /* default match */ 1788 .pvr_mask = 0x00000000, 1789 .pvr_value = 0x00000000, 1790 .cpu_name = "(generic 44x PPC)", 1791 .cpu_features = CPU_FTRS_44X, 1792 .cpu_user_features = COMMON_USER_BOOKE, 1793 .mmu_features = MMU_FTR_TYPE_44x, 1794 .icache_bsize = 32, 1795 .dcache_bsize = 32, 1796 .machine_check = machine_check_4xx, 1797 .platform = "ppc440", 1798 } 1799#else /* CONFIG_PPC_47x */ 1800 { /* 476 DD2 core */ 1801 .pvr_mask = 0xffffffff, 1802 .pvr_value = 0x11a52080, 1803 .cpu_name = "476", 1804 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1805 .cpu_user_features = COMMON_USER_BOOKE | 1806 PPC_FEATURE_HAS_FPU, 1807 .mmu_features = MMU_FTR_TYPE_47x | 1808 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1809 .icache_bsize = 32, 1810 .dcache_bsize = 128, 1811 .machine_check = machine_check_47x, 1812 .platform = "ppc470", 1813 }, 1814 { /* 476fpe */ 1815 .pvr_mask = 0xffff0000, 1816 .pvr_value = 0x7ff50000, 1817 .cpu_name = "476fpe", 1818 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2, 1819 .cpu_user_features = COMMON_USER_BOOKE | 1820 PPC_FEATURE_HAS_FPU, 1821 .mmu_features = MMU_FTR_TYPE_47x | 1822 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1823 .icache_bsize = 32, 1824 .dcache_bsize = 128, 1825 .machine_check = machine_check_47x, 1826 .platform = "ppc470", 1827 }, 1828 { /* 476 iss */ 1829 .pvr_mask = 0xffff0000, 1830 .pvr_value = 0x00050000, 1831 .cpu_name = "476", 1832 .cpu_features = CPU_FTRS_47X, 1833 .cpu_user_features = COMMON_USER_BOOKE | 1834 PPC_FEATURE_HAS_FPU, 1835 .mmu_features = MMU_FTR_TYPE_47x | 1836 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1837 .icache_bsize = 32, 1838 .dcache_bsize = 128, 1839 .machine_check = machine_check_47x, 1840 .platform = "ppc470", 1841 }, 1842 { /* 476 others */ 1843 .pvr_mask = 0xffff0000, 1844 .pvr_value = 0x11a50000, 1845 .cpu_name = "476", 1846 .cpu_features = CPU_FTRS_47X, 1847 .cpu_user_features = COMMON_USER_BOOKE | 1848 PPC_FEATURE_HAS_FPU, 1849 .mmu_features = MMU_FTR_TYPE_47x | 1850 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL, 1851 .icache_bsize = 32, 1852 .dcache_bsize = 128, 1853 .machine_check = machine_check_47x, 1854 .platform = "ppc470", 1855 }, 1856 { /* default match */ 1857 .pvr_mask = 0x00000000, 1858 .pvr_value = 0x00000000, 1859 .cpu_name = "(generic 47x PPC)", 1860 .cpu_features = CPU_FTRS_47X, 1861 .cpu_user_features = COMMON_USER_BOOKE, 1862 .mmu_features = MMU_FTR_TYPE_47x, 1863 .icache_bsize = 32, 1864 .dcache_bsize = 128, 1865 .machine_check = machine_check_47x, 1866 .platform = "ppc470", 1867 } 1868#endif /* CONFIG_PPC_47x */ 1869#endif /* CONFIG_44x */ 1870#endif /* CONFIG_PPC32 */ 1871#ifdef CONFIG_E500 1872#ifdef CONFIG_PPC32 1873#ifndef CONFIG_PPC_E500MC 1874 { /* e500 */ 1875 .pvr_mask = 0xffff0000, 1876 .pvr_value = 0x80200000, 1877 .cpu_name = "e500", 1878 .cpu_features = CPU_FTRS_E500, 1879 .cpu_user_features = COMMON_USER_BOOKE | 1880 PPC_FEATURE_HAS_SPE_COMP | 1881 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 1882 .cpu_user_features2 = PPC_FEATURE2_ISEL, 1883 .mmu_features = MMU_FTR_TYPE_FSL_E, 1884 .icache_bsize = 32, 1885 .dcache_bsize = 32, 1886 .num_pmcs = 4, 1887 .oprofile_cpu_type = "ppc/e500", 1888 .cpu_setup = __setup_cpu_e500v1, 1889 .machine_check = machine_check_e500, 1890 .platform = "ppc8540", 1891 }, 1892 { /* e500v2 */ 1893 .pvr_mask = 0xffff0000, 1894 .pvr_value = 0x80210000, 1895 .cpu_name = "e500v2", 1896 .cpu_features = CPU_FTRS_E500_2, 1897 .cpu_user_features = COMMON_USER_BOOKE | 1898 PPC_FEATURE_HAS_SPE_COMP | 1899 PPC_FEATURE_HAS_EFP_SINGLE_COMP | 1900 PPC_FEATURE_HAS_EFP_DOUBLE_COMP, 1901 .cpu_user_features2 = PPC_FEATURE2_ISEL, 1902 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS, 1903 .icache_bsize = 32, 1904 .dcache_bsize = 32, 1905 .num_pmcs = 4, 1906 .oprofile_cpu_type = "ppc/e500", 1907 .cpu_setup = __setup_cpu_e500v2, 1908 .machine_check = machine_check_e500, 1909 .platform = "ppc8548", 1910 .cpu_down_flush = cpu_down_flush_e500v2, 1911 }, 1912#else 1913 { /* e500mc */ 1914 .pvr_mask = 0xffff0000, 1915 .pvr_value = 0x80230000, 1916 .cpu_name = "e500mc", 1917 .cpu_features = CPU_FTRS_E500MC, 1918 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1919 .cpu_user_features2 = PPC_FEATURE2_ISEL, 1920 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 1921 MMU_FTR_USE_TLBILX, 1922 .icache_bsize = 64, 1923 .dcache_bsize = 64, 1924 .num_pmcs = 4, 1925 .oprofile_cpu_type = "ppc/e500mc", 1926 .cpu_setup = __setup_cpu_e500mc, 1927 .machine_check = machine_check_e500mc, 1928 .platform = "ppce500mc", 1929 .cpu_down_flush = cpu_down_flush_e500mc, 1930 }, 1931#endif /* CONFIG_PPC_E500MC */ 1932#endif /* CONFIG_PPC32 */ 1933#ifdef CONFIG_PPC_E500MC 1934 { /* e5500 */ 1935 .pvr_mask = 0xffff0000, 1936 .pvr_value = 0x80240000, 1937 .cpu_name = "e5500", 1938 .cpu_features = CPU_FTRS_E5500, 1939 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, 1940 .cpu_user_features2 = PPC_FEATURE2_ISEL, 1941 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 1942 MMU_FTR_USE_TLBILX, 1943 .icache_bsize = 64, 1944 .dcache_bsize = 64, 1945 .num_pmcs = 4, 1946 .oprofile_cpu_type = "ppc/e500mc", 1947 .cpu_setup = __setup_cpu_e5500, 1948#ifndef CONFIG_PPC32 1949 .cpu_restore = __restore_cpu_e5500, 1950#endif 1951 .machine_check = machine_check_e500mc, 1952 .platform = "ppce5500", 1953 .cpu_down_flush = cpu_down_flush_e5500, 1954 }, 1955 { /* e6500 */ 1956 .pvr_mask = 0xffff0000, 1957 .pvr_value = 0x80400000, 1958 .cpu_name = "e6500", 1959 .cpu_features = CPU_FTRS_E6500, 1960 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU | 1961 PPC_FEATURE_HAS_ALTIVEC_COMP, 1962 .cpu_user_features2 = PPC_FEATURE2_ISEL, 1963 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS | 1964 MMU_FTR_USE_TLBILX, 1965 .icache_bsize = 64, 1966 .dcache_bsize = 64, 1967 .num_pmcs = 6, 1968 .oprofile_cpu_type = "ppc/e6500", 1969 .cpu_setup = __setup_cpu_e6500, 1970#ifndef CONFIG_PPC32 1971 .cpu_restore = __restore_cpu_e6500, 1972#endif 1973 .machine_check = machine_check_e500mc, 1974 .platform = "ppce6500", 1975 .cpu_down_flush = cpu_down_flush_e6500, 1976 }, 1977#endif /* CONFIG_PPC_E500MC */ 1978#ifdef CONFIG_PPC32 1979 { /* default match */ 1980 .pvr_mask = 0x00000000, 1981 .pvr_value = 0x00000000, 1982 .cpu_name = "(generic E500 PPC)", 1983 .cpu_features = CPU_FTRS_E500, 1984 .cpu_user_features = COMMON_USER_BOOKE | 1985 PPC_FEATURE_HAS_SPE_COMP | 1986 PPC_FEATURE_HAS_EFP_SINGLE_COMP, 1987 .mmu_features = MMU_FTR_TYPE_FSL_E, 1988 .icache_bsize = 32, 1989 .dcache_bsize = 32, 1990 .machine_check = machine_check_e500, 1991 .platform = "powerpc", 1992 } 1993#endif /* CONFIG_PPC32 */ 1994#endif /* CONFIG_E500 */ 1995}; 1996 1997void __init set_cur_cpu_spec(struct cpu_spec *s) 1998{ 1999 struct cpu_spec *t = &the_cpu_spec; 2000 2001 t = PTRRELOC(t); 2002 /* 2003 * use memcpy() instead of *t = *s so that GCC replaces it 2004 * by __memcpy() when KASAN is active 2005 */ 2006 memcpy(t, s, sizeof(*t)); 2007 2008 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2009} 2010 2011static struct cpu_spec * __init setup_cpu_spec(unsigned long offset, 2012 struct cpu_spec *s) 2013{ 2014 struct cpu_spec *t = &the_cpu_spec; 2015 struct cpu_spec old; 2016 2017 t = PTRRELOC(t); 2018 old = *t; 2019 2020 /* 2021 * Copy everything, then do fixups. Use memcpy() instead of *t = *s 2022 * so that GCC replaces it by __memcpy() when KASAN is active 2023 */ 2024 memcpy(t, s, sizeof(*t)); 2025 2026 /* 2027 * If we are overriding a previous value derived from the real 2028 * PVR with a new value obtained using a logical PVR value, 2029 * don't modify the performance monitor fields. 2030 */ 2031 if (old.num_pmcs && !s->num_pmcs) { 2032 t->num_pmcs = old.num_pmcs; 2033 t->pmc_type = old.pmc_type; 2034 2035 /* 2036 * If we have passed through this logic once before and 2037 * have pulled the default case because the real PVR was 2038 * not found inside cpu_specs[], then we are possibly 2039 * running in compatibility mode. In that case, let the 2040 * oprofiler know which set of compatibility counters to 2041 * pull from by making sure the oprofile_cpu_type string 2042 * is set to that of compatibility mode. If the 2043 * oprofile_cpu_type already has a value, then we are 2044 * possibly overriding a real PVR with a logical one, 2045 * and, in that case, keep the current value for 2046 * oprofile_cpu_type. Furthermore, let's ensure that the 2047 * fix for the PMAO bug is enabled on compatibility mode. 2048 */ 2049 if (old.oprofile_cpu_type != NULL) { 2050 t->oprofile_cpu_type = old.oprofile_cpu_type; 2051 t->cpu_features |= old.cpu_features & CPU_FTR_PMAO_BUG; 2052 } 2053 } 2054 2055 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec; 2056 2057 /* 2058 * Set the base platform string once; assumes 2059 * we're called with real pvr first. 2060 */ 2061 if (*PTRRELOC(&powerpc_base_platform) == NULL) 2062 *PTRRELOC(&powerpc_base_platform) = t->platform; 2063 2064#if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE) 2065 /* ppc64 and booke expect identify_cpu to also call setup_cpu for 2066 * that processor. I will consolidate that at a later time, for now, 2067 * just use #ifdef. We also don't need to PTRRELOC the function 2068 * pointer on ppc64 and booke as we are running at 0 in real mode 2069 * on ppc64 and reloc_offset is always 0 on booke. 2070 */ 2071 if (t->cpu_setup) { 2072 t->cpu_setup(offset, t); 2073 } 2074#endif /* CONFIG_PPC64 || CONFIG_BOOKE */ 2075 2076 return t; 2077} 2078 2079struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr) 2080{ 2081 struct cpu_spec *s = cpu_specs; 2082 int i; 2083 2084 s = PTRRELOC(s); 2085 2086 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2087 if ((pvr & s->pvr_mask) == s->pvr_value) 2088 return setup_cpu_spec(offset, s); 2089 } 2090 2091 BUG(); 2092 2093 return NULL; 2094} 2095 2096/* 2097 * Used by cpufeatures to get the name for CPUs with a PVR table. 2098 * If they don't hae a PVR table, cpufeatures gets the name from 2099 * cpu device-tree node. 2100 */ 2101void __init identify_cpu_name(unsigned int pvr) 2102{ 2103 struct cpu_spec *s = cpu_specs; 2104 struct cpu_spec *t = &the_cpu_spec; 2105 int i; 2106 2107 s = PTRRELOC(s); 2108 t = PTRRELOC(t); 2109 2110 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) { 2111 if ((pvr & s->pvr_mask) == s->pvr_value) { 2112 t->cpu_name = s->cpu_name; 2113 return; 2114 } 2115 } 2116} 2117 2118 2119#ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS 2120struct static_key_true cpu_feature_keys[NUM_CPU_FTR_KEYS] = { 2121 [0 ... NUM_CPU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2122}; 2123EXPORT_SYMBOL_GPL(cpu_feature_keys); 2124 2125void __init cpu_feature_keys_init(void) 2126{ 2127 int i; 2128 2129 for (i = 0; i < NUM_CPU_FTR_KEYS; i++) { 2130 unsigned long f = 1ul << i; 2131 2132 if (!(cur_cpu_spec->cpu_features & f)) 2133 static_branch_disable(&cpu_feature_keys[i]); 2134 } 2135} 2136 2137struct static_key_true mmu_feature_keys[NUM_MMU_FTR_KEYS] = { 2138 [0 ... NUM_MMU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT 2139}; 2140EXPORT_SYMBOL(mmu_feature_keys); 2141 2142void __init mmu_feature_keys_init(void) 2143{ 2144 int i; 2145 2146 for (i = 0; i < NUM_MMU_FTR_KEYS; i++) { 2147 unsigned long f = 1ul << i; 2148 2149 if (!(cur_cpu_spec->mmu_features & f)) 2150 static_branch_disable(&mmu_feature_keys[i]); 2151 } 2152} 2153#endif