cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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of_platform.c (2415B)

      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*
      3 *    Copyright (C) 2006 Benjamin Herrenschmidt, IBM Corp.
      4 *			 <benh@kernel.crashing.org>
      5 *    and		 Arnd Bergmann, IBM Corp.
      6 */
      7
      8#undef DEBUG
      9
     10#include <linux/string.h>
     11#include <linux/kernel.h>
     12#include <linux/init.h>
     13#include <linux/export.h>
     14#include <linux/mod_devicetable.h>
     15#include <linux/pci.h>
     16#include <linux/of.h>
     17#include <linux/of_device.h>
     18#include <linux/of_platform.h>
     19#include <linux/atomic.h>
     20
     21#include <asm/errno.h>
     22#include <asm/topology.h>
     23#include <asm/pci-bridge.h>
     24#include <asm/ppc-pci.h>
     25#include <asm/eeh.h>
     26
     27#ifdef CONFIG_PPC_OF_PLATFORM_PCI
     28
     29/* The probing of PCI controllers from of_platform is currently
     30 * 64 bits only, mostly due to gratuitous differences between
     31 * the 32 and 64 bits PCI code on PowerPC and the 32 bits one
     32 * lacking some bits needed here.
     33 */
     34
     35static int of_pci_phb_probe(struct platform_device *dev)
     36{
     37	struct pci_controller *phb;
     38
     39	/* Check if we can do that ... */
     40	if (ppc_md.pci_setup_phb == NULL)
     41		return -ENODEV;
     42
     43	pr_info("Setting up PCI bus %pOF\n", dev->dev.of_node);
     44
     45	/* Alloc and setup PHB data structure */
     46	phb = pcibios_alloc_controller(dev->dev.of_node);
     47	if (!phb)
     48		return -ENODEV;
     49
     50	/* Setup parent in sysfs */
     51	phb->parent = &dev->dev;
     52
     53	/* Setup the PHB using arch provided callback */
     54	if (ppc_md.pci_setup_phb(phb)) {
     55		pcibios_free_controller(phb);
     56		return -ENODEV;
     57	}
     58
     59	/* Process "ranges" property */
     60	pci_process_bridge_OF_ranges(phb, dev->dev.of_node, 0);
     61
     62	/* Init pci_dn data structures */
     63	pci_devs_phb_init_dynamic(phb);
     64
     65	/* Create EEH PE for the PHB */
     66	eeh_phb_pe_create(phb);
     67
     68	/* Scan the bus */
     69	pcibios_scan_phb(phb);
     70	if (phb->bus == NULL)
     71		return -ENXIO;
     72
     73	/* Claim resources. This might need some rework as well depending
     74	 * whether we are doing probe-only or not, like assigning unassigned
     75	 * resources etc...
     76	 */
     77	pcibios_claim_one_bus(phb->bus);
     78
     79	/* Add probed PCI devices to the device model */
     80	pci_bus_add_devices(phb->bus);
     81
     82	return 0;
     83}
     84
     85static const struct of_device_id of_pci_phb_ids[] = {
     86	{ .type = "pci", },
     87	{ .type = "pcix", },
     88	{ .type = "pcie", },
     89	{ .type = "pciex", },
     90	{ .type = "ht", },
     91	{}
     92};
     93
     94static struct platform_driver of_pci_phb_driver = {
     95	.probe = of_pci_phb_probe,
     96	.driver = {
     97		.name = "of-pci",
     98		.of_match_table = of_pci_phb_ids,
     99	},
    100};
    101
    102builtin_platform_driver(of_pci_phb_driver);
    103
    104#endif /* CONFIG_PPC_OF_PLATFORM_PCI */