mmu_decl.h (5514B)
1/* SPDX-License-Identifier: GPL-2.0-or-later */ 2/* 3 * Declarations of procedures and variables shared between files 4 * in arch/ppc/mm/. 5 * 6 * Derived from arch/ppc/mm/init.c: 7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) 8 * 9 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au) 10 * and Cort Dougan (PReP) (cort@cs.nmt.edu) 11 * Copyright (C) 1996 Paul Mackerras 12 * 13 * Derived from "arch/i386/mm/init.c" 14 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds 15 */ 16#include <linux/mm.h> 17#include <asm/mmu.h> 18 19#ifdef CONFIG_PPC_MMU_NOHASH 20#include <asm/trace.h> 21 22/* 23 * On 40x and 8xx, we directly inline tlbia and tlbivax 24 */ 25#if defined(CONFIG_40x) || defined(CONFIG_PPC_8xx) 26static inline void _tlbil_all(void) 27{ 28 asm volatile ("sync; tlbia; isync" : : : "memory"); 29 trace_tlbia(MMU_NO_CONTEXT); 30} 31static inline void _tlbil_pid(unsigned int pid) 32{ 33 asm volatile ("sync; tlbia; isync" : : : "memory"); 34 trace_tlbia(pid); 35} 36#define _tlbil_pid_noind(pid) _tlbil_pid(pid) 37 38#else /* CONFIG_40x || CONFIG_PPC_8xx */ 39extern void _tlbil_all(void); 40extern void _tlbil_pid(unsigned int pid); 41#ifdef CONFIG_PPC_BOOK3E 42extern void _tlbil_pid_noind(unsigned int pid); 43#else 44#define _tlbil_pid_noind(pid) _tlbil_pid(pid) 45#endif 46#endif /* !(CONFIG_40x || CONFIG_PPC_8xx) */ 47 48/* 49 * On 8xx, we directly inline tlbie, on others, it's extern 50 */ 51#ifdef CONFIG_PPC_8xx 52static inline void _tlbil_va(unsigned long address, unsigned int pid, 53 unsigned int tsize, unsigned int ind) 54{ 55 asm volatile ("tlbie %0; sync" : : "r" (address) : "memory"); 56 trace_tlbie(0, 0, address, pid, 0, 0, 0); 57} 58#elif defined(CONFIG_PPC_BOOK3E) 59extern void _tlbil_va(unsigned long address, unsigned int pid, 60 unsigned int tsize, unsigned int ind); 61#else 62extern void __tlbil_va(unsigned long address, unsigned int pid); 63static inline void _tlbil_va(unsigned long address, unsigned int pid, 64 unsigned int tsize, unsigned int ind) 65{ 66 __tlbil_va(address, pid); 67} 68#endif /* CONFIG_PPC_8xx */ 69 70#if defined(CONFIG_PPC_BOOK3E) || defined(CONFIG_PPC_47x) 71extern void _tlbivax_bcast(unsigned long address, unsigned int pid, 72 unsigned int tsize, unsigned int ind); 73#else 74static inline void _tlbivax_bcast(unsigned long address, unsigned int pid, 75 unsigned int tsize, unsigned int ind) 76{ 77 BUG(); 78} 79#endif 80 81static inline void print_system_hash_info(void) {} 82 83#else /* CONFIG_PPC_MMU_NOHASH */ 84 85void print_system_hash_info(void); 86 87#endif /* CONFIG_PPC_MMU_NOHASH */ 88 89#ifdef CONFIG_PPC32 90 91extern void mapin_ram(void); 92extern void setbat(int index, unsigned long virt, phys_addr_t phys, 93 unsigned int size, pgprot_t prot); 94 95extern int __map_without_bats; 96extern unsigned int rtas_data, rtas_size; 97 98struct hash_pte; 99extern u8 early_hash[]; 100 101#endif /* CONFIG_PPC32 */ 102 103extern unsigned long __max_low_memory; 104extern phys_addr_t __initial_memory_limit_addr; 105extern phys_addr_t total_memory; 106extern phys_addr_t total_lowmem; 107extern phys_addr_t memstart_addr; 108extern phys_addr_t lowmem_end_addr; 109 110#ifdef CONFIG_WII 111extern unsigned long wii_hole_start; 112extern unsigned long wii_hole_size; 113 114extern unsigned long wii_mmu_mapin_mem2(unsigned long top); 115extern void wii_memory_fixups(void); 116#endif 117 118/* ...and now those things that may be slightly different between processor 119 * architectures. -- Dan 120 */ 121#ifdef CONFIG_PPC32 122extern void MMU_init_hw(void); 123void MMU_init_hw_patch(void); 124unsigned long mmu_mapin_ram(unsigned long base, unsigned long top); 125#endif 126 127#ifdef CONFIG_PPC_FSL_BOOK3E 128extern unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx, 129 bool dryrun, bool init); 130extern unsigned long calc_cam_sz(unsigned long ram, unsigned long virt, 131 phys_addr_t phys); 132#ifdef CONFIG_PPC32 133extern void adjust_total_lowmem(void); 134extern int switch_to_as1(void); 135extern void restore_to_as0(int esel, int offset, void *dt_ptr, int bootcpu); 136void create_kaslr_tlb_entry(int entry, unsigned long virt, phys_addr_t phys); 137void reloc_kernel_entry(void *fdt, int addr); 138extern int is_second_reloc; 139#endif 140extern void loadcam_entry(unsigned int index); 141extern void loadcam_multi(int first_idx, int num, int tmp_idx); 142 143#ifdef CONFIG_RANDOMIZE_BASE 144void kaslr_early_init(void *dt_ptr, phys_addr_t size); 145void kaslr_late_init(void); 146#else 147static inline void kaslr_early_init(void *dt_ptr, phys_addr_t size) {} 148static inline void kaslr_late_init(void) {} 149#endif 150 151struct tlbcam { 152 u32 MAS0; 153 u32 MAS1; 154 unsigned long MAS2; 155 u32 MAS3; 156 u32 MAS7; 157}; 158 159#define NUM_TLBCAMS 64 160 161extern struct tlbcam TLBCAM[NUM_TLBCAMS]; 162#endif 163 164#if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_FSL_BOOKE) || defined(CONFIG_PPC_8xx) 165/* 6xx have BATS */ 166/* FSL_BOOKE have TLBCAM */ 167/* 8xx have LTLB */ 168phys_addr_t v_block_mapped(unsigned long va); 169unsigned long p_block_mapped(phys_addr_t pa); 170#else 171static inline phys_addr_t v_block_mapped(unsigned long va) { return 0; } 172static inline unsigned long p_block_mapped(phys_addr_t pa) { return 0; } 173#endif 174 175#if defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_PPC_8xx) || defined(CONFIG_PPC_FSL_BOOK3E) 176void mmu_mark_initmem_nx(void); 177void mmu_mark_rodata_ro(void); 178#else 179static inline void mmu_mark_initmem_nx(void) { } 180static inline void mmu_mark_rodata_ro(void) { } 181#endif 182 183#ifdef CONFIG_PPC_8xx 184void __init mmu_mapin_immr(void); 185#endif 186 187#ifdef CONFIG_DEBUG_WX 188void ptdump_check_wx(void); 189#else 190static inline void ptdump_check_wx(void) { } 191#endif 192 193static inline bool debug_pagealloc_enabled_or_kfence(void) 194{ 195 return IS_ENABLED(CONFIG_KFENCE) || debug_pagealloc_enabled(); 196}