cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pageattr.c (2545B)

      1// SPDX-License-Identifier: GPL-2.0
      2
      3/*
      4 * MMU-generic set_memory implementation for powerpc
      5 *
      6 * Copyright 2019-2021, IBM Corporation.
      7 */
      8
      9#include <linux/mm.h>
     10#include <linux/vmalloc.h>
     11#include <linux/set_memory.h>
     12
     13#include <asm/mmu.h>
     14#include <asm/page.h>
     15#include <asm/pgtable.h>
     16
     17
     18static pte_basic_t pte_update_delta(pte_t *ptep, unsigned long addr,
     19				    unsigned long old, unsigned long new)
     20{
     21	return pte_update(&init_mm, addr, ptep, old & ~new, new & ~old, 0);
     22}
     23
     24/*
     25 * Updates the attributes of a page atomically.
     26 *
     27 * This sequence is safe against concurrent updates, and also allows updating the
     28 * attributes of a page currently being executed or accessed.
     29 */
     30static int change_page_attr(pte_t *ptep, unsigned long addr, void *data)
     31{
     32	long action = (long)data;
     33
     34	addr &= PAGE_MASK;
     35	/* modify the PTE bits as desired */
     36	switch (action) {
     37	case SET_MEMORY_RO:
     38		/* Don't clear DIRTY bit */
     39		pte_update_delta(ptep, addr, _PAGE_KERNEL_RW & ~_PAGE_DIRTY, _PAGE_KERNEL_RO);
     40		break;
     41	case SET_MEMORY_RW:
     42		pte_update_delta(ptep, addr, _PAGE_KERNEL_RO, _PAGE_KERNEL_RW);
     43		break;
     44	case SET_MEMORY_NX:
     45		pte_update_delta(ptep, addr, _PAGE_KERNEL_ROX, _PAGE_KERNEL_RO);
     46		break;
     47	case SET_MEMORY_X:
     48		pte_update_delta(ptep, addr, _PAGE_KERNEL_RO, _PAGE_KERNEL_ROX);
     49		break;
     50	case SET_MEMORY_NP:
     51		pte_update(&init_mm, addr, ptep, _PAGE_PRESENT, 0, 0);
     52		break;
     53	case SET_MEMORY_P:
     54		pte_update(&init_mm, addr, ptep, 0, _PAGE_PRESENT, 0);
     55		break;
     56	default:
     57		WARN_ON_ONCE(1);
     58		break;
     59	}
     60
     61	/* See ptesync comment in radix__set_pte_at() */
     62	if (radix_enabled())
     63		asm volatile("ptesync": : :"memory");
     64
     65	flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
     66
     67	return 0;
     68}
     69
     70int change_memory_attr(unsigned long addr, int numpages, long action)
     71{
     72	unsigned long start = ALIGN_DOWN(addr, PAGE_SIZE);
     73	unsigned long size = numpages * PAGE_SIZE;
     74
     75	if (!numpages)
     76		return 0;
     77
     78	if (WARN_ON_ONCE(is_vmalloc_or_module_addr((void *)addr) &&
     79			 is_vm_area_hugepages((void *)addr)))
     80		return -EINVAL;
     81
     82#ifdef CONFIG_PPC_BOOK3S_64
     83	/*
     84	 * On hash, the linear mapping is not in the Linux page table so
     85	 * apply_to_existing_page_range() will have no effect. If in the future
     86	 * the set_memory_* functions are used on the linear map this will need
     87	 * to be updated.
     88	 */
     89	if (!radix_enabled()) {
     90		int region = get_region_id(addr);
     91
     92		if (WARN_ON_ONCE(region != VMALLOC_REGION_ID && region != IO_REGION_ID))
     93			return -EINVAL;
     94	}
     95#endif
     96
     97	return apply_to_existing_page_range(&init_mm, start, size,
     98					    change_page_attr, (void *)action);
     99}