mpc8272_ads.c (5877B)
1// SPDX-License-Identifier: GPL-2.0-or-later 2/* 3 * MPC8272 ADS board support 4 * 5 * Copyright 2007 Freescale Semiconductor, Inc. 6 * Author: Scott Wood <scottwood@freescale.com> 7 * 8 * Based on code by Vitaly Bordug <vbordug@ru.mvista.com> 9 * Copyright (c) 2006 MontaVista Software, Inc. 10 */ 11 12#include <linux/init.h> 13#include <linux/interrupt.h> 14#include <linux/fsl_devices.h> 15#include <linux/of_address.h> 16#include <linux/of_fdt.h> 17#include <linux/of_platform.h> 18#include <linux/io.h> 19 20#include <asm/cpm2.h> 21#include <asm/udbg.h> 22#include <asm/machdep.h> 23#include <asm/time.h> 24 25#include <platforms/82xx/pq2.h> 26 27#include <sysdev/fsl_soc.h> 28#include <sysdev/cpm2_pic.h> 29 30#include "pq2.h" 31 32static void __init mpc8272_ads_pic_init(void) 33{ 34 struct device_node *np = of_find_compatible_node(NULL, NULL, 35 "fsl,cpm2-pic"); 36 if (!np) { 37 printk(KERN_ERR "PIC init: can not find fsl,cpm2-pic node\n"); 38 return; 39 } 40 41 cpm2_pic_init(np); 42 of_node_put(np); 43 44 /* Initialize stuff for the 82xx CPLD IC and install demux */ 45 pq2ads_pci_init_irq(); 46} 47 48struct cpm_pin { 49 int port, pin, flags; 50}; 51 52static struct cpm_pin mpc8272_ads_pins[] = { 53 /* SCC1 */ 54 {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, 55 {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 56 57 /* SCC4 */ 58 {3, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 59 {3, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 60 61 /* FCC1 */ 62 {0, 14, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 63 {0, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 64 {0, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 65 {0, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 66 {0, 18, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 67 {0, 19, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 68 {0, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 69 {0, 21, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 70 {0, 26, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, 71 {0, 27, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, 72 {0, 28, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, 73 {0, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, 74 {0, 30, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, 75 {0, 31, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, 76 {2, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 77 {2, 22, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 78 79 /* FCC2 */ 80 {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 81 {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 82 {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 83 {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 84 {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 85 {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 86 {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 87 {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 88 {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 89 {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 90 {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 91 {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY}, 92 {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 93 {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 94 {2, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 95 {2, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 96 97 /* I2C */ 98 {3, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN}, 99 {3, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN}, 100 101 /* USB */ 102 {2, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 103 {2, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 104 {2, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 105 {2, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 106 {3, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 107 {3, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 108 {3, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 109}; 110 111static void __init init_ioports(void) 112{ 113 int i; 114 115 for (i = 0; i < ARRAY_SIZE(mpc8272_ads_pins); i++) { 116 struct cpm_pin *pin = &mpc8272_ads_pins[i]; 117 cpm2_set_pin(pin->port, pin->pin, pin->flags); 118 } 119 120 cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX); 121 cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX); 122 cpm2_clk_setup(CPM_CLK_SCC3, CPM_CLK8, CPM_CLK_RX); 123 cpm2_clk_setup(CPM_CLK_SCC3, CPM_CLK8, CPM_CLK_TX); 124 cpm2_clk_setup(CPM_CLK_SCC4, CPM_BRG4, CPM_CLK_RX); 125 cpm2_clk_setup(CPM_CLK_SCC4, CPM_BRG4, CPM_CLK_TX); 126 cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK11, CPM_CLK_RX); 127 cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_TX); 128 cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK15, CPM_CLK_RX); 129 cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK16, CPM_CLK_TX); 130} 131 132static void __init mpc8272_ads_setup_arch(void) 133{ 134 struct device_node *np; 135 __be32 __iomem *bcsr; 136 137 if (ppc_md.progress) 138 ppc_md.progress("mpc8272_ads_setup_arch()", 0); 139 140 cpm2_reset(); 141 142 np = of_find_compatible_node(NULL, NULL, "fsl,mpc8272ads-bcsr"); 143 if (!np) { 144 printk(KERN_ERR "No bcsr in device tree\n"); 145 return; 146 } 147 148 bcsr = of_iomap(np, 0); 149 of_node_put(np); 150 if (!bcsr) { 151 printk(KERN_ERR "Cannot map BCSR registers\n"); 152 return; 153 } 154 155#define BCSR1_FETHIEN 0x08000000 156#define BCSR1_FETH_RST 0x04000000 157#define BCSR1_RS232_EN1 0x02000000 158#define BCSR1_RS232_EN2 0x01000000 159#define BCSR3_USB_nEN 0x80000000 160#define BCSR3_FETHIEN2 0x10000000 161#define BCSR3_FETH2_RST 0x08000000 162 163 clrbits32(&bcsr[1], BCSR1_RS232_EN1 | BCSR1_RS232_EN2 | BCSR1_FETHIEN); 164 setbits32(&bcsr[1], BCSR1_FETH_RST); 165 166 clrbits32(&bcsr[3], BCSR3_FETHIEN2); 167 setbits32(&bcsr[3], BCSR3_FETH2_RST); 168 169 clrbits32(&bcsr[3], BCSR3_USB_nEN); 170 171 iounmap(bcsr); 172 173 init_ioports(); 174 175 if (ppc_md.progress) 176 ppc_md.progress("mpc8272_ads_setup_arch(), finish", 0); 177} 178 179static const struct of_device_id of_bus_ids[] __initconst = { 180 { .name = "soc", }, 181 { .name = "cpm", }, 182 { .name = "localbus", }, 183 {}, 184}; 185 186static int __init declare_of_platform_devices(void) 187{ 188 /* Publish the QE devices */ 189 of_platform_bus_probe(NULL, of_bus_ids, NULL); 190 return 0; 191} 192machine_device_initcall(mpc8272_ads, declare_of_platform_devices); 193 194/* 195 * Called very early, device-tree isn't unflattened 196 */ 197static int __init mpc8272_ads_probe(void) 198{ 199 return of_machine_is_compatible("fsl,mpc8272ads"); 200} 201 202define_machine(mpc8272_ads) 203{ 204 .name = "Freescale MPC8272 ADS", 205 .probe = mpc8272_ads_probe, 206 .setup_arch = mpc8272_ads_setup_arch, 207 .discover_phbs = pq2_init_pci, 208 .init_IRQ = mpc8272_ads_pic_init, 209 .get_irq = cpm2_get_irq, 210 .calibrate_decr = generic_calibrate_decr, 211 .restart = pq2_restart, 212 .progress = udbg_progress, 213};