cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pq2ads.h (1360B)


      1/* SPDX-License-Identifier: GPL-2.0-or-later */
      2/*
      3 * PQ2/mpc8260 board-specific stuff
      4 *
      5 * A collection of structures, addresses, and values associated with
      6 * the Freescale MPC8260ADS/MPC8266ADS-PCI boards.
      7 * Copied from the RPX-Classic and SBS8260 stuff.
      8 *
      9 * Author: Vitaly Bordug <vbordug@ru.mvista.com>
     10 *
     11 * Originally written by Dan Malek for Motorola MPC8260 family
     12 *
     13 * Copyright (c) 2001 Dan Malek <dan@embeddedalley.com>
     14 * Copyright (c) 2006 MontaVista Software, Inc.
     15 */
     16
     17#ifdef __KERNEL__
     18#ifndef __MACH_ADS8260_DEFS
     19#define __MACH_ADS8260_DEFS
     20
     21#include <linux/seq_file.h>
     22
     23/* The ADS8260 has 16, 32-bit wide control/status registers, accessed
     24 * only on word boundaries.
     25 * Not all are used (yet), or are interesting to us (yet).
     26 */
     27
     28/* Things of interest in the CSR.
     29 */
     30#define BCSR0_LED0		((uint)0x02000000)      /* 0 == on */
     31#define BCSR0_LED1		((uint)0x01000000)      /* 0 == on */
     32#define BCSR1_FETHIEN		((uint)0x08000000)      /* 0 == enable*/
     33#define BCSR1_FETH_RST		((uint)0x04000000)      /* 0 == reset */
     34#define BCSR1_RS232_EN1		((uint)0x02000000)      /* 0 ==enable */
     35#define BCSR1_RS232_EN2		((uint)0x01000000)      /* 0 ==enable */
     36#define BCSR3_FETHIEN2		((uint)0x10000000)      /* 0 == enable*/
     37#define BCSR3_FETH2_RST		((uint)0x80000000)      /* 0 == reset */
     38
     39#endif /* __MACH_ADS8260_DEFS */
     40#endif /* __KERNEL__ */