cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mpc832x_mds.c (2518B)

      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*
      3 * Copyright 2006 Freescale Semiconductor, Inc. All rights reserved.
      4 *
      5 * Description:
      6 * MPC832xE MDS board specific routines.
      7 */
      8
      9#include <linux/stddef.h>
     10#include <linux/kernel.h>
     11#include <linux/init.h>
     12#include <linux/errno.h>
     13#include <linux/reboot.h>
     14#include <linux/pci.h>
     15#include <linux/kdev_t.h>
     16#include <linux/major.h>
     17#include <linux/console.h>
     18#include <linux/delay.h>
     19#include <linux/seq_file.h>
     20#include <linux/root_dev.h>
     21#include <linux/initrd.h>
     22#include <linux/of_platform.h>
     23#include <linux/of_device.h>
     24
     25#include <linux/atomic.h>
     26#include <asm/time.h>
     27#include <asm/io.h>
     28#include <asm/machdep.h>
     29#include <asm/ipic.h>
     30#include <asm/irq.h>
     31#include <asm/udbg.h>
     32#include <sysdev/fsl_soc.h>
     33#include <sysdev/fsl_pci.h>
     34#include <soc/fsl/qe/qe.h>
     35
     36#include "mpc83xx.h"
     37
     38#undef DEBUG
     39#ifdef DEBUG
     40#define DBG(fmt...) udbg_printf(fmt)
     41#else
     42#define DBG(fmt...)
     43#endif
     44
     45/* ************************************************************************
     46 *
     47 * Setup the architecture
     48 *
     49 */
     50static void __init mpc832x_sys_setup_arch(void)
     51{
     52	struct device_node *np;
     53	u8 __iomem *bcsr_regs = NULL;
     54
     55	mpc83xx_setup_arch();
     56
     57	/* Map BCSR area */
     58	np = of_find_node_by_name(NULL, "bcsr");
     59	if (np) {
     60		struct resource res;
     61
     62		of_address_to_resource(np, 0, &res);
     63		bcsr_regs = ioremap(res.start, resource_size(&res));
     64		of_node_put(np);
     65	}
     66
     67#ifdef CONFIG_QUICC_ENGINE
     68	if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) {
     69		par_io_init(np);
     70		of_node_put(np);
     71
     72		for_each_node_by_name(np, "ucc")
     73			par_io_of_config(np);
     74	}
     75
     76	if ((np = of_find_compatible_node(NULL, "network", "ucc_geth"))
     77			!= NULL){
     78		/* Reset the Ethernet PHYs */
     79#define BCSR8_FETH_RST 0x50
     80		clrbits8(&bcsr_regs[8], BCSR8_FETH_RST);
     81		udelay(1000);
     82		setbits8(&bcsr_regs[8], BCSR8_FETH_RST);
     83		iounmap(bcsr_regs);
     84		of_node_put(np);
     85	}
     86#endif				/* CONFIG_QUICC_ENGINE */
     87}
     88
     89machine_device_initcall(mpc832x_mds, mpc83xx_declare_of_platform_devices);
     90
     91/*
     92 * Called very early, MMU is off, device-tree isn't unflattened
     93 */
     94static int __init mpc832x_sys_probe(void)
     95{
     96	return of_machine_is_compatible("MPC832xMDS");
     97}
     98
     99define_machine(mpc832x_mds) {
    100	.name 		= "MPC832x MDS",
    101	.probe 		= mpc832x_sys_probe,
    102	.setup_arch 	= mpc832x_sys_setup_arch,
    103	.discover_phbs	= mpc83xx_setup_pci,
    104	.init_IRQ	= mpc83xx_ipic_init_IRQ,
    105	.get_irq 	= ipic_get_irq,
    106	.restart 	= mpc83xx_restart,
    107	.time_init 	= mpc83xx_time_init,
    108	.calibrate_decr	= generic_calibrate_decr,
    109	.progress 	= udbg_progress,
    110};