cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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tqm85xx.c (2882B)

      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*
      3 * Based on MPC8560 ADS and arch/ppc tqm85xx ports
      4 *
      5 * Maintained by Kumar Gala (see MAINTAINERS for contact information)
      6 *
      7 * Copyright 2008 Freescale Semiconductor Inc.
      8 *
      9 * Copyright (c) 2005-2006 DENX Software Engineering
     10 * Stefan Roese <sr@denx.de>
     11 *
     12 * Based on original work by
     13 * 	Kumar Gala <kumar.gala@freescale.com>
     14 *      Copyright 2004 Freescale Semiconductor Inc.
     15 */
     16
     17#include <linux/stddef.h>
     18#include <linux/kernel.h>
     19#include <linux/pci.h>
     20#include <linux/kdev_t.h>
     21#include <linux/delay.h>
     22#include <linux/seq_file.h>
     23#include <linux/of_platform.h>
     24
     25#include <asm/time.h>
     26#include <asm/machdep.h>
     27#include <asm/pci-bridge.h>
     28#include <asm/mpic.h>
     29#include <mm/mmu_decl.h>
     30#include <asm/udbg.h>
     31
     32#include <sysdev/fsl_soc.h>
     33#include <sysdev/fsl_pci.h>
     34
     35#include "mpc85xx.h"
     36
     37#ifdef CONFIG_CPM2
     38#include <asm/cpm2.h>
     39#endif /* CONFIG_CPM2 */
     40
     41static void __init tqm85xx_pic_init(void)
     42{
     43	struct mpic *mpic = mpic_alloc(NULL, 0,
     44			MPIC_BIG_ENDIAN,
     45			0, 256, " OpenPIC  ");
     46	BUG_ON(mpic == NULL);
     47	mpic_init(mpic);
     48
     49	mpc85xx_cpm2_pic_init();
     50}
     51
     52/*
     53 * Setup the architecture
     54 */
     55static void __init tqm85xx_setup_arch(void)
     56{
     57	if (ppc_md.progress)
     58		ppc_md.progress("tqm85xx_setup_arch()", 0);
     59
     60#ifdef CONFIG_CPM2
     61	cpm2_reset();
     62#endif
     63
     64	fsl_pci_assign_primary();
     65}
     66
     67static void tqm85xx_show_cpuinfo(struct seq_file *m)
     68{
     69	uint pvid, svid, phid1;
     70
     71	pvid = mfspr(SPRN_PVR);
     72	svid = mfspr(SPRN_SVR);
     73
     74	seq_printf(m, "Vendor\t\t: TQ Components\n");
     75	seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
     76	seq_printf(m, "SVR\t\t: 0x%x\n", svid);
     77
     78	/* Display cpu Pll setting */
     79	phid1 = mfspr(SPRN_HID1);
     80	seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
     81}
     82
     83static void tqm85xx_ti1520_fixup(struct pci_dev *pdev)
     84{
     85	unsigned int val;
     86
     87	/* Do not do the fixup on other platforms! */
     88	if (!machine_is(tqm85xx))
     89		return;
     90
     91	dev_info(&pdev->dev, "Using TI 1520 fixup on TQM85xx\n");
     92
     93	/*
     94	 * Enable P2CCLK bit in system control register
     95	 * to enable CLOCK output to power chip
     96	 */
     97	pci_read_config_dword(pdev, 0x80, &val);
     98	pci_write_config_dword(pdev, 0x80, val | (1 << 27));
     99
    100}
    101DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520,
    102		tqm85xx_ti1520_fixup);
    103
    104machine_arch_initcall(tqm85xx, mpc85xx_common_publish_devices);
    105
    106static const char * const board[] __initconst = {
    107	"tqc,tqm8540",
    108	"tqc,tqm8541",
    109	"tqc,tqm8548",
    110	"tqc,tqm8555",
    111	"tqc,tqm8560",
    112	NULL
    113};
    114
    115/*
    116 * Called very early, device-tree isn't unflattened
    117 */
    118static int __init tqm85xx_probe(void)
    119{
    120	return of_device_compatible_match(of_root, board);
    121}
    122
    123define_machine(tqm85xx) {
    124	.name			= "TQM85xx",
    125	.probe			= tqm85xx_probe,
    126	.setup_arch		= tqm85xx_setup_arch,
    127	.init_IRQ		= tqm85xx_pic_init,
    128	.show_cpuinfo		= tqm85xx_show_cpuinfo,
    129	.get_irq		= mpic_get_irq,
    130	.calibrate_decr		= generic_calibrate_decr,
    131	.progress		= udbg_progress,
    132};