cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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mpc86xx_hpcn.c (2661B)

      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*
      3 * MPC86xx HPCN board specific routines
      4 *
      5 * Recode: ZHANG WEI <wei.zhang@freescale.com>
      6 * Initial author: Xianghua Xiao <x.xiao@freescale.com>
      7 *
      8 * Copyright 2006 Freescale Semiconductor Inc.
      9 */
     10
     11#include <linux/stddef.h>
     12#include <linux/kernel.h>
     13#include <linux/pci.h>
     14#include <linux/kdev_t.h>
     15#include <linux/delay.h>
     16#include <linux/seq_file.h>
     17#include <linux/of_platform.h>
     18
     19#include <asm/time.h>
     20#include <asm/machdep.h>
     21#include <asm/pci-bridge.h>
     22#include <mm/mmu_decl.h>
     23#include <asm/udbg.h>
     24#include <asm/swiotlb.h>
     25
     26#include <asm/mpic.h>
     27
     28#include <sysdev/fsl_pci.h>
     29#include <sysdev/fsl_soc.h>
     30
     31#include "mpc86xx.h"
     32
     33#undef DEBUG
     34
     35#ifdef DEBUG
     36#define DBG(fmt...) do { printk(KERN_ERR fmt); } while(0)
     37#else
     38#define DBG(fmt...) do { } while(0)
     39#endif
     40
     41#ifdef CONFIG_PCI
     42extern int uli_exclude_device(struct pci_controller *hose,
     43				u_char bus, u_char devfn);
     44
     45static int mpc86xx_exclude_device(struct pci_controller *hose,
     46				   u_char bus, u_char devfn)
     47{
     48	if (hose->dn == fsl_pci_primary)
     49		return uli_exclude_device(hose, bus, devfn);
     50
     51	return PCIBIOS_SUCCESSFUL;
     52}
     53#endif /* CONFIG_PCI */
     54
     55
     56static void __init
     57mpc86xx_hpcn_setup_arch(void)
     58{
     59	if (ppc_md.progress)
     60		ppc_md.progress("mpc86xx_hpcn_setup_arch()", 0);
     61
     62#ifdef CONFIG_PCI
     63	ppc_md.pci_exclude_device = mpc86xx_exclude_device;
     64#endif
     65
     66	printk("MPC86xx HPCN board from Freescale Semiconductor\n");
     67
     68#ifdef CONFIG_SMP
     69	mpc86xx_smp_init();
     70#endif
     71
     72	fsl_pci_assign_primary();
     73
     74	swiotlb_detect_4g();
     75}
     76
     77
     78static void
     79mpc86xx_hpcn_show_cpuinfo(struct seq_file *m)
     80{
     81	uint svid = mfspr(SPRN_SVR);
     82
     83	seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
     84
     85	seq_printf(m, "SVR\t\t: 0x%x\n", svid);
     86}
     87
     88
     89/*
     90 * Called very early, device-tree isn't unflattened
     91 */
     92static int __init mpc86xx_hpcn_probe(void)
     93{
     94	if (of_machine_is_compatible("fsl,mpc8641hpcn"))
     95		return 1;	/* Looks good */
     96
     97	return 0;
     98}
     99
    100static const struct of_device_id of_bus_ids[] __initconst = {
    101	{ .compatible = "fsl,srio", },
    102	{},
    103};
    104
    105static int __init declare_of_platform_devices(void)
    106{
    107	mpc86xx_common_publish_devices();
    108	of_platform_bus_probe(NULL, of_bus_ids, NULL);
    109
    110	return 0;
    111}
    112machine_arch_initcall(mpc86xx_hpcn, declare_of_platform_devices);
    113
    114define_machine(mpc86xx_hpcn) {
    115	.name			= "MPC86xx HPCN",
    116	.probe			= mpc86xx_hpcn_probe,
    117	.setup_arch		= mpc86xx_hpcn_setup_arch,
    118	.init_IRQ		= mpc86xx_init_irq,
    119	.show_cpuinfo		= mpc86xx_hpcn_show_cpuinfo,
    120	.get_irq		= mpic_get_irq,
    121	.time_init		= mpc86xx_time_init,
    122	.calibrate_decr		= generic_calibrate_decr,
    123	.progress		= udbg_progress,
    124#ifdef CONFIG_PCI
    125	.pcibios_fixup_bus	= fsl_pcibios_fixup_bus,
    126#endif
    127};