cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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spu_base.c (18906B)


      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*
      3 * Low-level SPU handling
      4 *
      5 * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
      6 *
      7 * Author: Arnd Bergmann <arndb@de.ibm.com>
      8 */
      9
     10#undef DEBUG
     11
     12#include <linux/interrupt.h>
     13#include <linux/list.h>
     14#include <linux/init.h>
     15#include <linux/ptrace.h>
     16#include <linux/slab.h>
     17#include <linux/wait.h>
     18#include <linux/mm.h>
     19#include <linux/io.h>
     20#include <linux/mutex.h>
     21#include <linux/linux_logo.h>
     22#include <linux/syscore_ops.h>
     23#include <asm/spu.h>
     24#include <asm/spu_priv1.h>
     25#include <asm/spu_csa.h>
     26#include <asm/xmon.h>
     27#include <asm/kexec.h>
     28
     29const struct spu_management_ops *spu_management_ops;
     30EXPORT_SYMBOL_GPL(spu_management_ops);
     31
     32const struct spu_priv1_ops *spu_priv1_ops;
     33EXPORT_SYMBOL_GPL(spu_priv1_ops);
     34
     35struct cbe_spu_info cbe_spu_info[MAX_NUMNODES];
     36EXPORT_SYMBOL_GPL(cbe_spu_info);
     37
     38/*
     39 * The spufs fault-handling code needs to call force_sig_fault to raise signals
     40 * on DMA errors. Export it here to avoid general kernel-wide access to this
     41 * function
     42 */
     43EXPORT_SYMBOL_GPL(force_sig_fault);
     44
     45/*
     46 * Protects cbe_spu_info and spu->number.
     47 */
     48static DEFINE_SPINLOCK(spu_lock);
     49
     50/*
     51 * List of all spus in the system.
     52 *
     53 * This list is iterated by callers from irq context and callers that
     54 * want to sleep.  Thus modifications need to be done with both
     55 * spu_full_list_lock and spu_full_list_mutex held, while iterating
     56 * through it requires either of these locks.
     57 *
     58 * In addition spu_full_list_lock protects all assignments to
     59 * spu->mm.
     60 */
     61static LIST_HEAD(spu_full_list);
     62static DEFINE_SPINLOCK(spu_full_list_lock);
     63static DEFINE_MUTEX(spu_full_list_mutex);
     64
     65void spu_invalidate_slbs(struct spu *spu)
     66{
     67	struct spu_priv2 __iomem *priv2 = spu->priv2;
     68	unsigned long flags;
     69
     70	spin_lock_irqsave(&spu->register_lock, flags);
     71	if (spu_mfc_sr1_get(spu) & MFC_STATE1_RELOCATE_MASK)
     72		out_be64(&priv2->slb_invalidate_all_W, 0UL);
     73	spin_unlock_irqrestore(&spu->register_lock, flags);
     74}
     75EXPORT_SYMBOL_GPL(spu_invalidate_slbs);
     76
     77/* This is called by the MM core when a segment size is changed, to
     78 * request a flush of all the SPEs using a given mm
     79 */
     80void spu_flush_all_slbs(struct mm_struct *mm)
     81{
     82	struct spu *spu;
     83	unsigned long flags;
     84
     85	spin_lock_irqsave(&spu_full_list_lock, flags);
     86	list_for_each_entry(spu, &spu_full_list, full_list) {
     87		if (spu->mm == mm)
     88			spu_invalidate_slbs(spu);
     89	}
     90	spin_unlock_irqrestore(&spu_full_list_lock, flags);
     91}
     92
     93/* The hack below stinks... try to do something better one of
     94 * these days... Does it even work properly with NR_CPUS == 1 ?
     95 */
     96static inline void mm_needs_global_tlbie(struct mm_struct *mm)
     97{
     98	int nr = (NR_CPUS > 1) ? NR_CPUS : NR_CPUS + 1;
     99
    100	/* Global TLBIE broadcast required with SPEs. */
    101	bitmap_fill(cpumask_bits(mm_cpumask(mm)), nr);
    102}
    103
    104void spu_associate_mm(struct spu *spu, struct mm_struct *mm)
    105{
    106	unsigned long flags;
    107
    108	spin_lock_irqsave(&spu_full_list_lock, flags);
    109	spu->mm = mm;
    110	spin_unlock_irqrestore(&spu_full_list_lock, flags);
    111	if (mm)
    112		mm_needs_global_tlbie(mm);
    113}
    114EXPORT_SYMBOL_GPL(spu_associate_mm);
    115
    116int spu_64k_pages_available(void)
    117{
    118	return mmu_psize_defs[MMU_PAGE_64K].shift != 0;
    119}
    120EXPORT_SYMBOL_GPL(spu_64k_pages_available);
    121
    122static void spu_restart_dma(struct spu *spu)
    123{
    124	struct spu_priv2 __iomem *priv2 = spu->priv2;
    125
    126	if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags))
    127		out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
    128	else {
    129		set_bit(SPU_CONTEXT_FAULT_PENDING, &spu->flags);
    130		mb();
    131	}
    132}
    133
    134static inline void spu_load_slb(struct spu *spu, int slbe, struct copro_slb *slb)
    135{
    136	struct spu_priv2 __iomem *priv2 = spu->priv2;
    137
    138	pr_debug("%s: adding SLB[%d] 0x%016llx 0x%016llx\n",
    139			__func__, slbe, slb->vsid, slb->esid);
    140
    141	out_be64(&priv2->slb_index_W, slbe);
    142	/* set invalid before writing vsid */
    143	out_be64(&priv2->slb_esid_RW, 0);
    144	/* now it's safe to write the vsid */
    145	out_be64(&priv2->slb_vsid_RW, slb->vsid);
    146	/* setting the new esid makes the entry valid again */
    147	out_be64(&priv2->slb_esid_RW, slb->esid);
    148}
    149
    150static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
    151{
    152	struct copro_slb slb;
    153	int ret;
    154
    155	ret = copro_calculate_slb(spu->mm, ea, &slb);
    156	if (ret)
    157		return ret;
    158
    159	spu_load_slb(spu, spu->slb_replace, &slb);
    160
    161	spu->slb_replace++;
    162	if (spu->slb_replace >= 8)
    163		spu->slb_replace = 0;
    164
    165	spu_restart_dma(spu);
    166	spu->stats.slb_flt++;
    167	return 0;
    168}
    169
    170extern int hash_page(unsigned long ea, unsigned long access,
    171		     unsigned long trap, unsigned long dsisr); //XXX
    172static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr)
    173{
    174	int ret;
    175
    176	pr_debug("%s, %llx, %lx\n", __func__, dsisr, ea);
    177
    178	/*
    179	 * Handle kernel space hash faults immediately. User hash
    180	 * faults need to be deferred to process context.
    181	 */
    182	if ((dsisr & MFC_DSISR_PTE_NOT_FOUND) &&
    183	    (get_region_id(ea) != USER_REGION_ID)) {
    184
    185		spin_unlock(&spu->register_lock);
    186		ret = hash_page(ea,
    187				_PAGE_PRESENT | _PAGE_READ | _PAGE_PRIVILEGED,
    188				0x300, dsisr);
    189		spin_lock(&spu->register_lock);
    190
    191		if (!ret) {
    192			spu_restart_dma(spu);
    193			return 0;
    194		}
    195	}
    196
    197	spu->class_1_dar = ea;
    198	spu->class_1_dsisr = dsisr;
    199
    200	spu->stop_callback(spu, 1);
    201
    202	spu->class_1_dar = 0;
    203	spu->class_1_dsisr = 0;
    204
    205	return 0;
    206}
    207
    208static void __spu_kernel_slb(void *addr, struct copro_slb *slb)
    209{
    210	unsigned long ea = (unsigned long)addr;
    211	u64 llp;
    212
    213	if (get_region_id(ea) == LINEAR_MAP_REGION_ID)
    214		llp = mmu_psize_defs[mmu_linear_psize].sllp;
    215	else
    216		llp = mmu_psize_defs[mmu_virtual_psize].sllp;
    217
    218	slb->vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M) << SLB_VSID_SHIFT) |
    219		SLB_VSID_KERNEL | llp;
    220	slb->esid = (ea & ESID_MASK) | SLB_ESID_V;
    221}
    222
    223/**
    224 * Given an array of @nr_slbs SLB entries, @slbs, return non-zero if the
    225 * address @new_addr is present.
    226 */
    227static inline int __slb_present(struct copro_slb *slbs, int nr_slbs,
    228		void *new_addr)
    229{
    230	unsigned long ea = (unsigned long)new_addr;
    231	int i;
    232
    233	for (i = 0; i < nr_slbs; i++)
    234		if (!((slbs[i].esid ^ ea) & ESID_MASK))
    235			return 1;
    236
    237	return 0;
    238}
    239
    240/**
    241 * Setup the SPU kernel SLBs, in preparation for a context save/restore. We
    242 * need to map both the context save area, and the save/restore code.
    243 *
    244 * Because the lscsa and code may cross segment boundaries, we check to see
    245 * if mappings are required for the start and end of each range. We currently
    246 * assume that the mappings are smaller that one segment - if not, something
    247 * is seriously wrong.
    248 */
    249void spu_setup_kernel_slbs(struct spu *spu, struct spu_lscsa *lscsa,
    250		void *code, int code_size)
    251{
    252	struct copro_slb slbs[4];
    253	int i, nr_slbs = 0;
    254	/* start and end addresses of both mappings */
    255	void *addrs[] = {
    256		lscsa, (void *)lscsa + sizeof(*lscsa) - 1,
    257		code, code + code_size - 1
    258	};
    259
    260	/* check the set of addresses, and create a new entry in the slbs array
    261	 * if there isn't already a SLB for that address */
    262	for (i = 0; i < ARRAY_SIZE(addrs); i++) {
    263		if (__slb_present(slbs, nr_slbs, addrs[i]))
    264			continue;
    265
    266		__spu_kernel_slb(addrs[i], &slbs[nr_slbs]);
    267		nr_slbs++;
    268	}
    269
    270	spin_lock_irq(&spu->register_lock);
    271	/* Add the set of SLBs */
    272	for (i = 0; i < nr_slbs; i++)
    273		spu_load_slb(spu, i, &slbs[i]);
    274	spin_unlock_irq(&spu->register_lock);
    275}
    276EXPORT_SYMBOL_GPL(spu_setup_kernel_slbs);
    277
    278static irqreturn_t
    279spu_irq_class_0(int irq, void *data)
    280{
    281	struct spu *spu;
    282	unsigned long stat, mask;
    283
    284	spu = data;
    285
    286	spin_lock(&spu->register_lock);
    287	mask = spu_int_mask_get(spu, 0);
    288	stat = spu_int_stat_get(spu, 0) & mask;
    289
    290	spu->class_0_pending |= stat;
    291	spu->class_0_dar = spu_mfc_dar_get(spu);
    292	spu->stop_callback(spu, 0);
    293	spu->class_0_pending = 0;
    294	spu->class_0_dar = 0;
    295
    296	spu_int_stat_clear(spu, 0, stat);
    297	spin_unlock(&spu->register_lock);
    298
    299	return IRQ_HANDLED;
    300}
    301
    302static irqreturn_t
    303spu_irq_class_1(int irq, void *data)
    304{
    305	struct spu *spu;
    306	unsigned long stat, mask, dar, dsisr;
    307
    308	spu = data;
    309
    310	/* atomically read & clear class1 status. */
    311	spin_lock(&spu->register_lock);
    312	mask  = spu_int_mask_get(spu, 1);
    313	stat  = spu_int_stat_get(spu, 1) & mask;
    314	dar   = spu_mfc_dar_get(spu);
    315	dsisr = spu_mfc_dsisr_get(spu);
    316	if (stat & CLASS1_STORAGE_FAULT_INTR)
    317		spu_mfc_dsisr_set(spu, 0ul);
    318	spu_int_stat_clear(spu, 1, stat);
    319
    320	pr_debug("%s: %lx %lx %lx %lx\n", __func__, mask, stat,
    321			dar, dsisr);
    322
    323	if (stat & CLASS1_SEGMENT_FAULT_INTR)
    324		__spu_trap_data_seg(spu, dar);
    325
    326	if (stat & CLASS1_STORAGE_FAULT_INTR)
    327		__spu_trap_data_map(spu, dar, dsisr);
    328
    329	if (stat & CLASS1_LS_COMPARE_SUSPEND_ON_GET_INTR)
    330		;
    331
    332	if (stat & CLASS1_LS_COMPARE_SUSPEND_ON_PUT_INTR)
    333		;
    334
    335	spu->class_1_dsisr = 0;
    336	spu->class_1_dar = 0;
    337
    338	spin_unlock(&spu->register_lock);
    339
    340	return stat ? IRQ_HANDLED : IRQ_NONE;
    341}
    342
    343static irqreturn_t
    344spu_irq_class_2(int irq, void *data)
    345{
    346	struct spu *spu;
    347	unsigned long stat;
    348	unsigned long mask;
    349	const int mailbox_intrs =
    350		CLASS2_MAILBOX_THRESHOLD_INTR | CLASS2_MAILBOX_INTR;
    351
    352	spu = data;
    353	spin_lock(&spu->register_lock);
    354	stat = spu_int_stat_get(spu, 2);
    355	mask = spu_int_mask_get(spu, 2);
    356	/* ignore interrupts we're not waiting for */
    357	stat &= mask;
    358	/* mailbox interrupts are level triggered. mask them now before
    359	 * acknowledging */
    360	if (stat & mailbox_intrs)
    361		spu_int_mask_and(spu, 2, ~(stat & mailbox_intrs));
    362	/* acknowledge all interrupts before the callbacks */
    363	spu_int_stat_clear(spu, 2, stat);
    364
    365	pr_debug("class 2 interrupt %d, %lx, %lx\n", irq, stat, mask);
    366
    367	if (stat & CLASS2_MAILBOX_INTR)
    368		spu->ibox_callback(spu);
    369
    370	if (stat & CLASS2_SPU_STOP_INTR)
    371		spu->stop_callback(spu, 2);
    372
    373	if (stat & CLASS2_SPU_HALT_INTR)
    374		spu->stop_callback(spu, 2);
    375
    376	if (stat & CLASS2_SPU_DMA_TAG_GROUP_COMPLETE_INTR)
    377		spu->mfc_callback(spu);
    378
    379	if (stat & CLASS2_MAILBOX_THRESHOLD_INTR)
    380		spu->wbox_callback(spu);
    381
    382	spu->stats.class2_intr++;
    383
    384	spin_unlock(&spu->register_lock);
    385
    386	return stat ? IRQ_HANDLED : IRQ_NONE;
    387}
    388
    389static int __init spu_request_irqs(struct spu *spu)
    390{
    391	int ret = 0;
    392
    393	if (spu->irqs[0]) {
    394		snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0",
    395			 spu->number);
    396		ret = request_irq(spu->irqs[0], spu_irq_class_0,
    397				  0, spu->irq_c0, spu);
    398		if (ret)
    399			goto bail0;
    400	}
    401	if (spu->irqs[1]) {
    402		snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1",
    403			 spu->number);
    404		ret = request_irq(spu->irqs[1], spu_irq_class_1,
    405				  0, spu->irq_c1, spu);
    406		if (ret)
    407			goto bail1;
    408	}
    409	if (spu->irqs[2]) {
    410		snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2",
    411			 spu->number);
    412		ret = request_irq(spu->irqs[2], spu_irq_class_2,
    413				  0, spu->irq_c2, spu);
    414		if (ret)
    415			goto bail2;
    416	}
    417	return 0;
    418
    419bail2:
    420	if (spu->irqs[1])
    421		free_irq(spu->irqs[1], spu);
    422bail1:
    423	if (spu->irqs[0])
    424		free_irq(spu->irqs[0], spu);
    425bail0:
    426	return ret;
    427}
    428
    429static void spu_free_irqs(struct spu *spu)
    430{
    431	if (spu->irqs[0])
    432		free_irq(spu->irqs[0], spu);
    433	if (spu->irqs[1])
    434		free_irq(spu->irqs[1], spu);
    435	if (spu->irqs[2])
    436		free_irq(spu->irqs[2], spu);
    437}
    438
    439void spu_init_channels(struct spu *spu)
    440{
    441	static const struct {
    442		 unsigned channel;
    443		 unsigned count;
    444	} zero_list[] = {
    445		{ 0x00, 1, }, { 0x01, 1, }, { 0x03, 1, }, { 0x04, 1, },
    446		{ 0x18, 1, }, { 0x19, 1, }, { 0x1b, 1, }, { 0x1d, 1, },
    447	}, count_list[] = {
    448		{ 0x00, 0, }, { 0x03, 0, }, { 0x04, 0, }, { 0x15, 16, },
    449		{ 0x17, 1, }, { 0x18, 0, }, { 0x19, 0, }, { 0x1b, 0, },
    450		{ 0x1c, 1, }, { 0x1d, 0, }, { 0x1e, 1, },
    451	};
    452	struct spu_priv2 __iomem *priv2;
    453	int i;
    454
    455	priv2 = spu->priv2;
    456
    457	/* initialize all channel data to zero */
    458	for (i = 0; i < ARRAY_SIZE(zero_list); i++) {
    459		int count;
    460
    461		out_be64(&priv2->spu_chnlcntptr_RW, zero_list[i].channel);
    462		for (count = 0; count < zero_list[i].count; count++)
    463			out_be64(&priv2->spu_chnldata_RW, 0);
    464	}
    465
    466	/* initialize channel counts to meaningful values */
    467	for (i = 0; i < ARRAY_SIZE(count_list); i++) {
    468		out_be64(&priv2->spu_chnlcntptr_RW, count_list[i].channel);
    469		out_be64(&priv2->spu_chnlcnt_RW, count_list[i].count);
    470	}
    471}
    472EXPORT_SYMBOL_GPL(spu_init_channels);
    473
    474static struct bus_type spu_subsys = {
    475	.name = "spu",
    476	.dev_name = "spu",
    477};
    478
    479int spu_add_dev_attr(struct device_attribute *attr)
    480{
    481	struct spu *spu;
    482
    483	mutex_lock(&spu_full_list_mutex);
    484	list_for_each_entry(spu, &spu_full_list, full_list)
    485		device_create_file(&spu->dev, attr);
    486	mutex_unlock(&spu_full_list_mutex);
    487
    488	return 0;
    489}
    490EXPORT_SYMBOL_GPL(spu_add_dev_attr);
    491
    492int spu_add_dev_attr_group(const struct attribute_group *attrs)
    493{
    494	struct spu *spu;
    495	int rc = 0;
    496
    497	mutex_lock(&spu_full_list_mutex);
    498	list_for_each_entry(spu, &spu_full_list, full_list) {
    499		rc = sysfs_create_group(&spu->dev.kobj, attrs);
    500
    501		/* we're in trouble here, but try unwinding anyway */
    502		if (rc) {
    503			printk(KERN_ERR "%s: can't create sysfs group '%s'\n",
    504					__func__, attrs->name);
    505
    506			list_for_each_entry_continue_reverse(spu,
    507					&spu_full_list, full_list)
    508				sysfs_remove_group(&spu->dev.kobj, attrs);
    509			break;
    510		}
    511	}
    512
    513	mutex_unlock(&spu_full_list_mutex);
    514
    515	return rc;
    516}
    517EXPORT_SYMBOL_GPL(spu_add_dev_attr_group);
    518
    519
    520void spu_remove_dev_attr(struct device_attribute *attr)
    521{
    522	struct spu *spu;
    523
    524	mutex_lock(&spu_full_list_mutex);
    525	list_for_each_entry(spu, &spu_full_list, full_list)
    526		device_remove_file(&spu->dev, attr);
    527	mutex_unlock(&spu_full_list_mutex);
    528}
    529EXPORT_SYMBOL_GPL(spu_remove_dev_attr);
    530
    531void spu_remove_dev_attr_group(const struct attribute_group *attrs)
    532{
    533	struct spu *spu;
    534
    535	mutex_lock(&spu_full_list_mutex);
    536	list_for_each_entry(spu, &spu_full_list, full_list)
    537		sysfs_remove_group(&spu->dev.kobj, attrs);
    538	mutex_unlock(&spu_full_list_mutex);
    539}
    540EXPORT_SYMBOL_GPL(spu_remove_dev_attr_group);
    541
    542static int __init spu_create_dev(struct spu *spu)
    543{
    544	int ret;
    545
    546	spu->dev.id = spu->number;
    547	spu->dev.bus = &spu_subsys;
    548	ret = device_register(&spu->dev);
    549	if (ret) {
    550		printk(KERN_ERR "Can't register SPU %d with sysfs\n",
    551				spu->number);
    552		return ret;
    553	}
    554
    555	sysfs_add_device_to_node(&spu->dev, spu->node);
    556
    557	return 0;
    558}
    559
    560static int __init create_spu(void *data)
    561{
    562	struct spu *spu;
    563	int ret;
    564	static int number;
    565	unsigned long flags;
    566
    567	ret = -ENOMEM;
    568	spu = kzalloc(sizeof (*spu), GFP_KERNEL);
    569	if (!spu)
    570		goto out;
    571
    572	spu->alloc_state = SPU_FREE;
    573
    574	spin_lock_init(&spu->register_lock);
    575	spin_lock(&spu_lock);
    576	spu->number = number++;
    577	spin_unlock(&spu_lock);
    578
    579	ret = spu_create_spu(spu, data);
    580
    581	if (ret)
    582		goto out_free;
    583
    584	spu_mfc_sdr_setup(spu);
    585	spu_mfc_sr1_set(spu, 0x33);
    586	ret = spu_request_irqs(spu);
    587	if (ret)
    588		goto out_destroy;
    589
    590	ret = spu_create_dev(spu);
    591	if (ret)
    592		goto out_free_irqs;
    593
    594	mutex_lock(&cbe_spu_info[spu->node].list_mutex);
    595	list_add(&spu->cbe_list, &cbe_spu_info[spu->node].spus);
    596	cbe_spu_info[spu->node].n_spus++;
    597	mutex_unlock(&cbe_spu_info[spu->node].list_mutex);
    598
    599	mutex_lock(&spu_full_list_mutex);
    600	spin_lock_irqsave(&spu_full_list_lock, flags);
    601	list_add(&spu->full_list, &spu_full_list);
    602	spin_unlock_irqrestore(&spu_full_list_lock, flags);
    603	mutex_unlock(&spu_full_list_mutex);
    604
    605	spu->stats.util_state = SPU_UTIL_IDLE_LOADED;
    606	spu->stats.tstamp = ktime_get_ns();
    607
    608	INIT_LIST_HEAD(&spu->aff_list);
    609
    610	goto out;
    611
    612out_free_irqs:
    613	spu_free_irqs(spu);
    614out_destroy:
    615	spu_destroy_spu(spu);
    616out_free:
    617	kfree(spu);
    618out:
    619	return ret;
    620}
    621
    622static const char *spu_state_names[] = {
    623	"user", "system", "iowait", "idle"
    624};
    625
    626static unsigned long long spu_acct_time(struct spu *spu,
    627		enum spu_utilization_state state)
    628{
    629	unsigned long long time = spu->stats.times[state];
    630
    631	/*
    632	 * If the spu is idle or the context is stopped, utilization
    633	 * statistics are not updated.  Apply the time delta from the
    634	 * last recorded state of the spu.
    635	 */
    636	if (spu->stats.util_state == state)
    637		time += ktime_get_ns() - spu->stats.tstamp;
    638
    639	return time / NSEC_PER_MSEC;
    640}
    641
    642
    643static ssize_t spu_stat_show(struct device *dev,
    644				struct device_attribute *attr, char *buf)
    645{
    646	struct spu *spu = container_of(dev, struct spu, dev);
    647
    648	return sprintf(buf, "%s %llu %llu %llu %llu "
    649		      "%llu %llu %llu %llu %llu %llu %llu %llu\n",
    650		spu_state_names[spu->stats.util_state],
    651		spu_acct_time(spu, SPU_UTIL_USER),
    652		spu_acct_time(spu, SPU_UTIL_SYSTEM),
    653		spu_acct_time(spu, SPU_UTIL_IOWAIT),
    654		spu_acct_time(spu, SPU_UTIL_IDLE_LOADED),
    655		spu->stats.vol_ctx_switch,
    656		spu->stats.invol_ctx_switch,
    657		spu->stats.slb_flt,
    658		spu->stats.hash_flt,
    659		spu->stats.min_flt,
    660		spu->stats.maj_flt,
    661		spu->stats.class2_intr,
    662		spu->stats.libassist);
    663}
    664
    665static DEVICE_ATTR(stat, 0444, spu_stat_show, NULL);
    666
    667#ifdef CONFIG_KEXEC_CORE
    668
    669struct crash_spu_info {
    670	struct spu *spu;
    671	u32 saved_spu_runcntl_RW;
    672	u32 saved_spu_status_R;
    673	u32 saved_spu_npc_RW;
    674	u64 saved_mfc_sr1_RW;
    675	u64 saved_mfc_dar;
    676	u64 saved_mfc_dsisr;
    677};
    678
    679#define CRASH_NUM_SPUS	16	/* Enough for current hardware */
    680static struct crash_spu_info crash_spu_info[CRASH_NUM_SPUS];
    681
    682static void crash_kexec_stop_spus(void)
    683{
    684	struct spu *spu;
    685	int i;
    686	u64 tmp;
    687
    688	for (i = 0; i < CRASH_NUM_SPUS; i++) {
    689		if (!crash_spu_info[i].spu)
    690			continue;
    691
    692		spu = crash_spu_info[i].spu;
    693
    694		crash_spu_info[i].saved_spu_runcntl_RW =
    695			in_be32(&spu->problem->spu_runcntl_RW);
    696		crash_spu_info[i].saved_spu_status_R =
    697			in_be32(&spu->problem->spu_status_R);
    698		crash_spu_info[i].saved_spu_npc_RW =
    699			in_be32(&spu->problem->spu_npc_RW);
    700
    701		crash_spu_info[i].saved_mfc_dar    = spu_mfc_dar_get(spu);
    702		crash_spu_info[i].saved_mfc_dsisr  = spu_mfc_dsisr_get(spu);
    703		tmp = spu_mfc_sr1_get(spu);
    704		crash_spu_info[i].saved_mfc_sr1_RW = tmp;
    705
    706		tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK;
    707		spu_mfc_sr1_set(spu, tmp);
    708
    709		__delay(200);
    710	}
    711}
    712
    713static void __init crash_register_spus(struct list_head *list)
    714{
    715	struct spu *spu;
    716	int ret;
    717
    718	list_for_each_entry(spu, list, full_list) {
    719		if (WARN_ON(spu->number >= CRASH_NUM_SPUS))
    720			continue;
    721
    722		crash_spu_info[spu->number].spu = spu;
    723	}
    724
    725	ret = crash_shutdown_register(&crash_kexec_stop_spus);
    726	if (ret)
    727		printk(KERN_ERR "Could not register SPU crash handler");
    728}
    729
    730#else
    731static inline void crash_register_spus(struct list_head *list)
    732{
    733}
    734#endif
    735
    736static void spu_shutdown(void)
    737{
    738	struct spu *spu;
    739
    740	mutex_lock(&spu_full_list_mutex);
    741	list_for_each_entry(spu, &spu_full_list, full_list) {
    742		spu_free_irqs(spu);
    743		spu_destroy_spu(spu);
    744	}
    745	mutex_unlock(&spu_full_list_mutex);
    746}
    747
    748static struct syscore_ops spu_syscore_ops = {
    749	.shutdown = spu_shutdown,
    750};
    751
    752static int __init init_spu_base(void)
    753{
    754	int i, ret = 0;
    755
    756	for (i = 0; i < MAX_NUMNODES; i++) {
    757		mutex_init(&cbe_spu_info[i].list_mutex);
    758		INIT_LIST_HEAD(&cbe_spu_info[i].spus);
    759	}
    760
    761	if (!spu_management_ops)
    762		goto out;
    763
    764	/* create system subsystem for spus */
    765	ret = subsys_system_register(&spu_subsys, NULL);
    766	if (ret)
    767		goto out;
    768
    769	ret = spu_enumerate_spus(create_spu);
    770
    771	if (ret < 0) {
    772		printk(KERN_WARNING "%s: Error initializing spus\n",
    773			__func__);
    774		goto out_unregister_subsys;
    775	}
    776
    777	if (ret > 0)
    778		fb_append_extra_logo(&logo_spe_clut224, ret);
    779
    780	mutex_lock(&spu_full_list_mutex);
    781	xmon_register_spus(&spu_full_list);
    782	crash_register_spus(&spu_full_list);
    783	mutex_unlock(&spu_full_list_mutex);
    784	spu_add_dev_attr(&dev_attr_stat);
    785	register_syscore_ops(&spu_syscore_ops);
    786
    787	spu_init_affinity();
    788
    789	return 0;
    790
    791 out_unregister_subsys:
    792	bus_unregister(&spu_subsys);
    793 out:
    794	return ret;
    795}
    796device_initcall(init_spu_base);