cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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storcenter.c (3008B)


      1/*
      2 * Board setup routines for the storcenter
      3 *
      4 * Copyright 2007 (C) Oyvind Repvik (nail@nslu2-linux.org)
      5 * Copyright 2007 Andy Wilcox, Jon Loeliger
      6 *
      7 * Based on linkstation.c by G. Liakhovetski
      8 *
      9 * This file is licensed under the terms of the GNU General Public License
     10 * version 2.  This program is licensed "as is" without any warranty of
     11 * any kind, whether express or implied.
     12 */
     13
     14#include <linux/kernel.h>
     15#include <linux/pci.h>
     16#include <linux/initrd.h>
     17#include <linux/of_platform.h>
     18
     19#include <asm/time.h>
     20#include <asm/mpic.h>
     21#include <asm/pci-bridge.h>
     22
     23#include "mpc10x.h"
     24
     25
     26static const struct of_device_id storcenter_of_bus[] __initconst = {
     27	{ .name = "soc", },
     28	{},
     29};
     30
     31static int __init storcenter_device_probe(void)
     32{
     33	of_platform_bus_probe(NULL, storcenter_of_bus, NULL);
     34	return 0;
     35}
     36machine_device_initcall(storcenter, storcenter_device_probe);
     37
     38
     39static int __init storcenter_add_bridge(struct device_node *dev)
     40{
     41#ifdef CONFIG_PCI
     42	int len;
     43	struct pci_controller *hose;
     44	const int *bus_range;
     45
     46	printk("Adding PCI host bridge %pOF\n", dev);
     47
     48	hose = pcibios_alloc_controller(dev);
     49	if (hose == NULL)
     50		return -ENOMEM;
     51
     52	bus_range = of_get_property(dev, "bus-range", &len);
     53	hose->first_busno = bus_range ? bus_range[0] : 0;
     54	hose->last_busno = bus_range ? bus_range[1] : 0xff;
     55
     56	setup_indirect_pci(hose, MPC10X_MAPB_CNFG_ADDR, MPC10X_MAPB_CNFG_DATA, 0);
     57
     58	/* Interpret the "ranges" property */
     59	/* This also maps the I/O region and sets isa_io/mem_base */
     60	pci_process_bridge_OF_ranges(hose, dev, 1);
     61#endif
     62
     63	return 0;
     64}
     65
     66static void __init storcenter_setup_arch(void)
     67{
     68	printk(KERN_INFO "IOMEGA StorCenter\n");
     69}
     70
     71static void __init storcenter_setup_pci(void)
     72{
     73	struct device_node *np;
     74
     75	/* Lookup PCI host bridges */
     76	for_each_compatible_node(np, "pci", "mpc10x-pci")
     77		storcenter_add_bridge(np);
     78}
     79
     80/*
     81 * Interrupt setup and service.  Interrupts on the turbostation come
     82 * from the four PCI slots plus onboard 8241 devices: I2C, DUART.
     83 */
     84static void __init storcenter_init_IRQ(void)
     85{
     86	struct mpic *mpic;
     87
     88	mpic = mpic_alloc(NULL, 0, 0, 16, 0, " OpenPIC  ");
     89	BUG_ON(mpic == NULL);
     90
     91	/*
     92	 * 16 Serial Interrupts followed by 16 Internal Interrupts.
     93	 * I2C is the second internal, so it is at 17, 0x11020.
     94	 */
     95	mpic_assign_isu(mpic, 0, mpic->paddr + 0x10200);
     96	mpic_assign_isu(mpic, 1, mpic->paddr + 0x11000);
     97
     98	mpic_init(mpic);
     99}
    100
    101static void __noreturn storcenter_restart(char *cmd)
    102{
    103	local_irq_disable();
    104
    105	/* Set exception prefix high - to the firmware */
    106	mtmsr(mfmsr() | MSR_IP);
    107	isync();
    108
    109	/* Wait for reset to happen */
    110	for (;;) ;
    111}
    112
    113static int __init storcenter_probe(void)
    114{
    115	return of_machine_is_compatible("iomega,storcenter");
    116}
    117
    118define_machine(storcenter){
    119	.name 			= "IOMEGA StorCenter",
    120	.probe 			= storcenter_probe,
    121	.setup_arch 		= storcenter_setup_arch,
    122	.discover_phbs 		= storcenter_setup_pci,
    123	.init_IRQ 		= storcenter_init_IRQ,
    124	.get_irq 		= mpic_get_irq,
    125	.restart 		= storcenter_restart,
    126	.calibrate_decr 	= generic_calibrate_decr,
    127};