cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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opal-wrappers.S (1435B)


      1/* SPDX-License-Identifier: GPL-2.0-or-later */
      2/*
      3 * PowerNV OPAL API wrappers
      4 *
      5 * Copyright 2011 IBM Corp.
      6 */
      7
      8#include <linux/jump_label.h>
      9#include <asm/ppc_asm.h>
     10#include <asm/hvcall.h>
     11#include <asm/asm-offsets.h>
     12#include <asm/opal.h>
     13#include <asm/asm-compat.h>
     14#include <asm/feature-fixups.h>
     15
     16	.section ".text"
     17
     18/*
     19 * r3-r10		- OPAL call arguments
     20 * STK_PARAM(R11)	- OPAL opcode
     21 * STK_PARAM(R12)	- MSR to restore
     22 */
     23_GLOBAL_TOC(__opal_call)
     24	mflr	r0
     25	std	r0,PPC_LR_STKOFF(r1)
     26	ld	r12,STK_PARAM(R12)(r1)
     27	li	r0,MSR_IR|MSR_DR|MSR_LE
     28	andc	r12,r12,r0
     29	LOAD_REG_ADDR(r11, opal_return)
     30	mtlr	r11
     31	LOAD_REG_ADDR(r11, opal)
     32	ld	r2,0(r11)
     33	ld	r11,8(r11)
     34	mtspr	SPRN_HSRR0,r11
     35	mtspr	SPRN_HSRR1,r12
     36	/* set token to r0 */
     37	ld	r0,STK_PARAM(R11)(r1)
     38	hrfid
     39opal_return:
     40	/*
     41	 * Restore MSR on OPAL return. The MSR is set to big-endian.
     42	 */
     43#ifdef __BIG_ENDIAN__
     44	ld	r11,STK_PARAM(R12)(r1)
     45	mtmsrd	r11
     46#else
     47	/* Endian can only be switched with rfi, must byte reverse MSR load */
     48	.short 0x4039	 /* li r10,STK_PARAM(R12)		*/
     49	.byte (STK_PARAM(R12) >> 8) & 0xff
     50	.byte STK_PARAM(R12) & 0xff
     51
     52	.long 0x280c6a7d /* ldbrx r11,r10,r1			*/
     53	.long 0x05009f42 /* bcl 20,31,$+4			*/
     54	.long 0xa602487d /* mflr r10				*/
     55	.long 0x14004a39 /* addi r10,r10,20			*/
     56	.long 0xa64b5a7d /* mthsrr0 r10				*/
     57	.long 0xa64b7b7d /* mthsrr1 r11				*/
     58	.long 0x2402004c /* hrfid				*/
     59#endif
     60	ld	r2,PACATOC(r13)
     61	ld	r0,PPC_LR_STKOFF(r1)
     62	mtlr	r0
     63	blr