cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sipeed_maix_dock.dts (4812B)


      1// SPDX-License-Identifier: GPL-2.0+
      2/*
      3 * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
      4 * Copyright (C) 2020 Western Digital Corporation or its affiliates.
      5 */
      6
      7/dts-v1/;
      8
      9#include "k210.dtsi"
     10
     11#include <dt-bindings/gpio/gpio.h>
     12#include <dt-bindings/input/input.h>
     13#include <dt-bindings/leds/common.h>
     14
     15/ {
     16	model = "SiPeed MAIX Dock";
     17	compatible = "sipeed,maix-dock-m1", "sipeed,maix-dock-m1w",
     18		     "canaan,kendryte-k210";
     19
     20	chosen {
     21		bootargs = "earlycon console=ttySIF0";
     22		stdout-path = "serial0:115200n8";
     23	};
     24
     25	gpio-leds {
     26		compatible = "gpio-leds";
     27
     28		/*
     29		 * Note: the board wiring drawing documents green on
     30		 * gpio #4, red on gpio #5 and blue on gpio #6. However,
     31		 * the board is actually wired differently as defined here.
     32		 */
     33		led0 {
     34			color = <LED_COLOR_ID_BLUE>;
     35			label = "blue";
     36			gpios = <&gpio1_0 4 GPIO_ACTIVE_LOW>;
     37		};
     38
     39		led1 {
     40			color = <LED_COLOR_ID_GREEN>;
     41			label = "green";
     42			gpios = <&gpio1_0 5 GPIO_ACTIVE_LOW>;
     43		};
     44
     45		led2 {
     46			color = <LED_COLOR_ID_RED>;
     47			label = "red";
     48			gpios = <&gpio1_0 6 GPIO_ACTIVE_LOW>;
     49		};
     50	};
     51
     52	gpio-keys {
     53		compatible = "gpio-keys";
     54
     55		boot {
     56			label = "BOOT";
     57			linux,code = <BTN_0>;
     58			gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
     59		};
     60	};
     61};
     62
     63&fpioa {
     64	pinctrl-0 = <&jtag_pinctrl>;
     65	pinctrl-names = "default";
     66	status = "okay";
     67
     68	jtag_pinctrl: jtag-pinmux {
     69		pinmux = <K210_FPIOA(0, K210_PCF_JTAG_TCLK)>,
     70			 <K210_FPIOA(1, K210_PCF_JTAG_TDI)>,
     71			 <K210_FPIOA(2, K210_PCF_JTAG_TMS)>,
     72			 <K210_FPIOA(3, K210_PCF_JTAG_TDO)>;
     73	};
     74
     75	uarths_pinctrl: uarths-pinmux {
     76		pinmux = <K210_FPIOA(4, K210_PCF_UARTHS_RX)>,
     77			 <K210_FPIOA(5, K210_PCF_UARTHS_TX)>;
     78	};
     79
     80	gpio_pinctrl: gpio-pinmux {
     81		pinmux = <K210_FPIOA(8, K210_PCF_GPIO0)>,
     82			 <K210_FPIOA(11, K210_PCF_GPIO3)>,
     83			 <K210_FPIOA(12, K210_PCF_GPIO4)>,
     84			 <K210_FPIOA(13, K210_PCF_GPIO5)>,
     85			 <K210_FPIOA(14, K210_PCF_GPIO6)>,
     86			 <K210_FPIOA(15, K210_PCF_GPIO7)>;
     87	};
     88
     89	gpiohs_pinctrl: gpiohs-pinmux {
     90		pinmux = <K210_FPIOA(16, K210_PCF_GPIOHS0)>,
     91			 <K210_FPIOA(17, K210_PCF_GPIOHS1)>,
     92			 <K210_FPIOA(21, K210_PCF_GPIOHS5)>,
     93			 <K210_FPIOA(22, K210_PCF_GPIOHS6)>,
     94			 <K210_FPIOA(23, K210_PCF_GPIOHS7)>,
     95			 <K210_FPIOA(24, K210_PCF_GPIOHS8)>,
     96			 <K210_FPIOA(25, K210_PCF_GPIOHS9)>,
     97			 <K210_FPIOA(32, K210_PCF_GPIOHS16)>,
     98			 <K210_FPIOA(33, K210_PCF_GPIOHS17)>,
     99			 <K210_FPIOA(34, K210_PCF_GPIOHS18)>,
    100			 <K210_FPIOA(35, K210_PCF_GPIOHS19)>;
    101	};
    102
    103	i2s0_pinctrl: i2s0-pinmux {
    104		pinmux = <K210_FPIOA(18, K210_PCF_I2S0_SCLK)>,
    105			 <K210_FPIOA(19, K210_PCF_I2S0_WS)>,
    106			 <K210_FPIOA(20, K210_PCF_I2S0_IN_D0)>;
    107	};
    108
    109	dvp_pinctrl: dvp-pinmux {
    110		pinmux = <K210_FPIOA(40, K210_PCF_SCCB_SDA)>,
    111			 <K210_FPIOA(41, K210_PCF_SCCB_SCLK)>,
    112			 <K210_FPIOA(42, K210_PCF_DVP_RST)>,
    113			 <K210_FPIOA(43, K210_PCF_DVP_VSYNC)>,
    114			 <K210_FPIOA(44, K210_PCF_DVP_PWDN)>,
    115			 <K210_FPIOA(45, K210_PCF_DVP_HSYNC)>,
    116			 <K210_FPIOA(46, K210_PCF_DVP_XCLK)>,
    117			 <K210_FPIOA(47, K210_PCF_DVP_PCLK)>;
    118	};
    119
    120	spi0_pinctrl: spi0-pinmux {
    121		pinmux = <K210_FPIOA(36, K210_PCF_GPIOHS20)>,  /* cs */
    122			 <K210_FPIOA(37, K210_PCF_GPIOHS21)>,  /* rst */
    123			 <K210_FPIOA(38, K210_PCF_GPIOHS22)>,  /* dc */
    124			 <K210_FPIOA(39, K210_PCF_SPI0_SCLK)>; /* wr */
    125	};
    126
    127	spi1_pinctrl: spi1-pinmux {
    128		pinmux = <K210_FPIOA(26, K210_PCF_SPI1_D1)>,
    129			 <K210_FPIOA(27, K210_PCF_SPI1_SCLK)>,
    130			 <K210_FPIOA(28, K210_PCF_SPI1_D0)>,
    131			 <K210_FPIOA(29, K210_PCF_GPIOHS13)>; /* cs */
    132	};
    133
    134	i2c1_pinctrl: i2c1-pinmux {
    135		pinmux = <K210_FPIOA(9, K210_PCF_I2C1_SCLK)>,
    136			 <K210_FPIOA(10, K210_PCF_I2C1_SDA)>;
    137	};
    138};
    139
    140&uarths0 {
    141	pinctrl-0 = <&uarths_pinctrl>;
    142	pinctrl-names = "default";
    143	status = "okay";
    144};
    145
    146&gpio0 {
    147	pinctrl-0 = <&gpiohs_pinctrl>;
    148	pinctrl-names = "default";
    149	status = "okay";
    150};
    151
    152&gpio1 {
    153	pinctrl-0 = <&gpio_pinctrl>;
    154	pinctrl-names = "default";
    155	status = "okay";
    156};
    157
    158&i2s0 {
    159	#sound-dai-cells = <1>;
    160	pinctrl-0 = <&i2s0_pinctrl>;
    161	pinctrl-names = "default";
    162};
    163
    164&i2c1 {
    165	pinctrl-0 = <&i2c1_pinctrl>;
    166	pinctrl-names = "default";
    167	clock-frequency = <400000>;
    168	status = "okay";
    169};
    170
    171&spi0 {
    172	pinctrl-0 = <&spi0_pinctrl>;
    173	pinctrl-names = "default";
    174	num-cs = <1>;
    175	cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
    176
    177	panel@0 {
    178		compatible = "sitronix,st7789v";
    179		reg = <0>;
    180		reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
    181		dc-gpios = <&gpio0 22 0>;
    182		spi-max-frequency = <15000000>;
    183		status = "disabled";
    184	};
    185};
    186
    187&spi1 {
    188	pinctrl-0 = <&spi1_pinctrl>;
    189	pinctrl-names = "default";
    190	num-cs = <1>;
    191	cs-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
    192	status = "okay";
    193
    194	slot@0 {
    195		compatible = "mmc-spi-slot";
    196		reg = <0>;
    197		voltage-ranges = <3300 3300>;
    198		spi-max-frequency = <25000000>;
    199		broken-cd;
    200	};
    201};
    202
    203&spi3 {
    204	flash@0 {
    205		compatible = "jedec,spi-nor";
    206		reg = <0>;
    207		spi-max-frequency = <50000000>;
    208		spi-tx-bus-width = <4>;
    209		spi-rx-bus-width = <4>;
    210		m25p,fast-read;
    211		broken-flash-reset;
    212	};
    213};