cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sipeed_maix_go.dts (4874B)


      1// SPDX-License-Identifier: GPL-2.0+
      2/*
      3 * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com>
      4 * Copyright (C) 2020 Western Digital Corporation or its affiliates.
      5 */
      6
      7/dts-v1/;
      8
      9#include "k210.dtsi"
     10
     11#include <dt-bindings/gpio/gpio.h>
     12#include <dt-bindings/input/input.h>
     13#include <dt-bindings/leds/common.h>
     14
     15/ {
     16	model = "SiPeed MAIX GO";
     17	compatible = "sipeed,maix-go", "canaan,kendryte-k210";
     18
     19	chosen {
     20		bootargs = "earlycon console=ttySIF0";
     21		stdout-path = "serial0:115200n8";
     22	};
     23
     24	gpio-leds {
     25		compatible = "gpio-leds";
     26
     27		led0 {
     28			color = <LED_COLOR_ID_GREEN>;
     29			label = "green";
     30			gpios = <&gpio1_0 4 GPIO_ACTIVE_LOW>;
     31		};
     32
     33		led1 {
     34			color = <LED_COLOR_ID_RED>;
     35			label = "red";
     36			gpios = <&gpio1_0 5 GPIO_ACTIVE_LOW>;
     37		};
     38
     39		led2 {
     40			color = <LED_COLOR_ID_BLUE>;
     41			label = "blue";
     42			gpios = <&gpio1_0 6 GPIO_ACTIVE_LOW>;
     43		};
     44	};
     45
     46	gpio-keys {
     47		compatible = "gpio-keys";
     48
     49		up {
     50			label = "UP";
     51			linux,code = <BTN_1>;
     52			gpios = <&gpio1_0 7 GPIO_ACTIVE_LOW>;
     53		};
     54
     55		press {
     56			label = "PRESS";
     57			linux,code = <BTN_0>;
     58			gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
     59		};
     60
     61		down {
     62			label = "DOWN";
     63			linux,code = <BTN_2>;
     64			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
     65		};
     66	};
     67};
     68
     69&fpioa {
     70	pinctrl-0 = <&jtag_pinctrl>;
     71	pinctrl-names = "default";
     72	status = "okay";
     73
     74	jtag_pinctrl: jtag-pinmux {
     75		pinmux = <K210_FPIOA(0, K210_PCF_JTAG_TCLK)>,
     76			 <K210_FPIOA(1, K210_PCF_JTAG_TDI)>,
     77			 <K210_FPIOA(2, K210_PCF_JTAG_TMS)>,
     78			 <K210_FPIOA(3, K210_PCF_JTAG_TDO)>;
     79	};
     80
     81	uarths_pinctrl: uarths-pinmux {
     82		pinmux = <K210_FPIOA(4, K210_PCF_UARTHS_RX)>,
     83			 <K210_FPIOA(5, K210_PCF_UARTHS_TX)>;
     84	};
     85
     86	gpio_pinctrl: gpio-pinmux {
     87		pinmux = <K210_FPIOA(8, K210_PCF_GPIO0)>,
     88			 <K210_FPIOA(9, K210_PCF_GPIO1)>,
     89			 <K210_FPIOA(10, K210_PCF_GPIO2)>,
     90			 <K210_FPIOA(11, K210_PCF_GPIO3)>,
     91			 <K210_FPIOA(12, K210_PCF_GPIO4)>,
     92			 <K210_FPIOA(13, K210_PCF_GPIO5)>,
     93			 <K210_FPIOA(14, K210_PCF_GPIO6)>,
     94			 <K210_FPIOA(15, K210_PCF_GPIO7)>;
     95	};
     96
     97	gpiohs_pinctrl: gpiohs-pinmux {
     98		pinmux = <K210_FPIOA(16, K210_PCF_GPIOHS0)>,
     99			 <K210_FPIOA(17, K210_PCF_GPIOHS1)>,
    100			 <K210_FPIOA(21, K210_PCF_GPIOHS5)>,
    101			 <K210_FPIOA(22, K210_PCF_GPIOHS6)>,
    102			 <K210_FPIOA(23, K210_PCF_GPIOHS7)>,
    103			 <K210_FPIOA(24, K210_PCF_GPIOHS8)>,
    104			 <K210_FPIOA(25, K210_PCF_GPIOHS9)>,
    105			 <K210_FPIOA(32, K210_PCF_GPIOHS16)>,
    106			 <K210_FPIOA(33, K210_PCF_GPIOHS17)>,
    107			 <K210_FPIOA(34, K210_PCF_GPIOHS18)>,
    108			 <K210_FPIOA(35, K210_PCF_GPIOHS19)>;
    109	};
    110
    111	i2s0_pinctrl: i2s0-pinmux {
    112		pinmux = <K210_FPIOA(18, K210_PCF_I2S0_SCLK)>,
    113			 <K210_FPIOA(19, K210_PCF_I2S0_WS)>,
    114			 <K210_FPIOA(20, K210_PCF_I2S0_IN_D0)>;
    115	};
    116
    117	dvp_pinctrl: dvp-pinmux {
    118		pinmux = <K210_FPIOA(40, K210_PCF_SCCB_SDA)>,
    119			 <K210_FPIOA(41, K210_PCF_SCCB_SCLK)>,
    120			 <K210_FPIOA(42, K210_PCF_DVP_RST)>,
    121			 <K210_FPIOA(43, K210_PCF_DVP_VSYNC)>,
    122			 <K210_FPIOA(44, K210_PCF_DVP_PWDN)>,
    123			 <K210_FPIOA(45, K210_PCF_DVP_HSYNC)>,
    124			 <K210_FPIOA(46, K210_PCF_DVP_XCLK)>,
    125			 <K210_FPIOA(47, K210_PCF_DVP_PCLK)>;
    126	};
    127
    128	spi0_pinctrl: spi0-pinmux {
    129		pinmux = <K210_FPIOA(36, K210_PCF_GPIOHS20)>,  /* cs */
    130			 <K210_FPIOA(37, K210_PCF_GPIOHS21)>,  /* rst */
    131			 <K210_FPIOA(38, K210_PCF_GPIOHS22)>,  /* dc */
    132			 <K210_FPIOA(39, K210_PCF_SPI0_SCLK)>; /* wr */
    133	};
    134
    135	spi1_pinctrl: spi1-pinmux {
    136		pinmux = <K210_FPIOA(26, K210_PCF_SPI1_D1)>,
    137			 <K210_FPIOA(27, K210_PCF_SPI1_SCLK)>,
    138			 <K210_FPIOA(28, K210_PCF_SPI1_D0)>,
    139			 <K210_FPIOA(29, K210_PCF_GPIOHS13)>; /* cs */
    140	};
    141
    142	i2c1_pinctrl: i2c1-pinmux {
    143		pinmux = <K210_FPIOA(30, K210_PCF_I2C1_SCLK)>,
    144			 <K210_FPIOA(31, K210_PCF_I2C1_SDA)>;
    145	};
    146};
    147
    148&uarths0 {
    149	pinctrl-0 = <&uarths_pinctrl>;
    150	pinctrl-names = "default";
    151	status = "okay";
    152};
    153
    154&gpio0 {
    155	pinctrl-0 = <&gpiohs_pinctrl>;
    156	pinctrl-names = "default";
    157	status = "okay";
    158};
    159
    160&gpio1 {
    161	pinctrl-0 = <&gpio_pinctrl>;
    162	pinctrl-names = "default";
    163	status = "okay";
    164};
    165
    166&i2s0 {
    167	#sound-dai-cells = <1>;
    168	pinctrl-0 = <&i2s0_pinctrl>;
    169	pinctrl-names = "default";
    170};
    171
    172&i2c1 {
    173	pinctrl-0 = <&i2c1_pinctrl>;
    174	pinctrl-names = "default";
    175	clock-frequency = <400000>;
    176	status = "okay";
    177};
    178
    179&spi0 {
    180	pinctrl-0 = <&spi0_pinctrl>;
    181	pinctrl-names = "default";
    182	num-cs = <1>;
    183	cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
    184
    185	panel@0 {
    186		compatible = "sitronix,st7789v";
    187		reg = <0>;
    188		reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
    189		dc-gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
    190		spi-max-frequency = <15000000>;
    191		status = "disabled";
    192	};
    193};
    194
    195&spi1 {
    196	pinctrl-0 = <&spi1_pinctrl>;
    197	pinctrl-names = "default";
    198	num-cs = <1>;
    199	cs-gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
    200	status = "okay";
    201
    202	slot@0 {
    203		compatible = "mmc-spi-slot";
    204		reg = <0>;
    205		voltage-ranges = <3300 3300>;
    206		spi-max-frequency = <25000000>;
    207		broken-cd;
    208	};
    209};
    210
    211&spi3 {
    212	flash@0 {
    213		compatible = "jedec,spi-nor";
    214		reg = <0>;
    215		spi-max-frequency = <50000000>;
    216		spi-tx-bus-width = <4>;
    217		spi-rx-bus-width = <4>;
    218		m25p,fast-read;
    219		broken-flash-reset;
    220	};
    221};