sipeed_maixduino.dts (4495B)
1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Copyright (C) 2019-20 Sean Anderson <seanga2@gmail.com> 4 * Copyright (C) 2020 Western Digital Corporation or its affiliates. 5 */ 6 7/dts-v1/; 8 9#include "k210.dtsi" 10 11#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/input/input.h> 13 14/ { 15 model = "SiPeed MAIXDUINO"; 16 compatible = "sipeed,maixduino", "canaan,kendryte-k210"; 17 18 chosen { 19 bootargs = "earlycon console=ttySIF0"; 20 stdout-path = "serial0:115200n8"; 21 }; 22 23 gpio-keys { 24 compatible = "gpio-keys"; 25 26 boot { 27 label = "BOOT"; 28 linux,code = <BTN_0>; 29 gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; 30 }; 31 }; 32 33 vcc_3v3: regulator-3v3 { 34 compatible = "regulator-fixed"; 35 regulator-name = "3v3"; 36 regulator-min-microvolt = <3300000>; 37 regulator-max-microvolt = <3300000>; 38 }; 39}; 40 41&fpioa { 42 status = "okay"; 43 44 uarths_pinctrl: uarths-pinmux { 45 pinmux = <K210_FPIOA(4, K210_PCF_UARTHS_RX)>, /* Header "0" */ 46 <K210_FPIOA(5, K210_PCF_UARTHS_TX)>; /* Header "1" */ 47 }; 48 49 gpio_pinctrl: gpio-pinmux { 50 pinmux = <K210_FPIOA(8, K210_PCF_GPIO0)>, 51 <K210_FPIOA(9, K210_PCF_GPIO1)>; 52 }; 53 54 gpiohs_pinctrl: gpiohs-pinmux { 55 pinmux = <K210_FPIOA(16, K210_PCF_GPIOHS0)>, /* BOOT */ 56 <K210_FPIOA(21, K210_PCF_GPIOHS2)>, /* Header "2" */ 57 <K210_FPIOA(22, K210_PCF_GPIOHS3)>, /* Header "3" */ 58 <K210_FPIOA(23, K210_PCF_GPIOHS4)>, /* Header "4" */ 59 <K210_FPIOA(24, K210_PCF_GPIOHS5)>, /* Header "5" */ 60 <K210_FPIOA(32, K210_PCF_GPIOHS6)>, /* Header "6" */ 61 <K210_FPIOA(15, K210_PCF_GPIOHS7)>, /* Header "7" */ 62 <K210_FPIOA(14, K210_PCF_GPIOHS8)>, /* Header "8" */ 63 <K210_FPIOA(13, K210_PCF_GPIOHS9)>, /* Header "9" */ 64 <K210_FPIOA(12, K210_PCF_GPIOHS10)>, /* Header "10" */ 65 <K210_FPIOA(11, K210_PCF_GPIOHS11)>, /* Header "11" */ 66 <K210_FPIOA(10, K210_PCF_GPIOHS12)>, /* Header "12" */ 67 <K210_FPIOA(3, K210_PCF_GPIOHS13)>; /* Header "13" */ 68 }; 69 70 i2s0_pinctrl: i2s0-pinmux { 71 pinmux = <K210_FPIOA(18, K210_PCF_I2S0_SCLK)>, 72 <K210_FPIOA(19, K210_PCF_I2S0_WS)>, 73 <K210_FPIOA(20, K210_PCF_I2S0_IN_D0)>; 74 }; 75 76 spi1_pinctrl: spi1-pinmux { 77 pinmux = <K210_FPIOA(26, K210_PCF_SPI1_D1)>, 78 <K210_FPIOA(27, K210_PCF_SPI1_SCLK)>, 79 <K210_FPIOA(28, K210_PCF_SPI1_D0)>, 80 <K210_FPIOA(29, K210_PCF_GPIO2)>; /* cs */ 81 }; 82 83 i2c1_pinctrl: i2c1-pinmux { 84 pinmux = <K210_FPIOA(30, K210_PCF_I2C1_SCLK)>, /* Header "scl" */ 85 <K210_FPIOA(31, K210_PCF_I2C1_SDA)>; /* Header "sda" */ 86 }; 87 88 i2s1_pinctrl: i2s1-pinmux { 89 pinmux = <K210_FPIOA(33, K210_PCF_I2S1_WS)>, 90 <K210_FPIOA(34, K210_PCF_I2S1_IN_D0)>, 91 <K210_FPIOA(35, K210_PCF_I2S1_SCLK)>; 92 }; 93 94 spi0_pinctrl: spi0-pinmux { 95 pinmux = <K210_FPIOA(36, K210_PCF_GPIOHS20)>, /* cs */ 96 <K210_FPIOA(37, K210_PCF_GPIOHS21)>, /* rst */ 97 <K210_FPIOA(38, K210_PCF_GPIOHS22)>, /* dc */ 98 <K210_FPIOA(39, K210_PCF_SPI0_SCLK)>; /* wr */ 99 }; 100 101 dvp_pinctrl: dvp-pinmux { 102 pinmux = <K210_FPIOA(40, K210_PCF_SCCB_SDA)>, 103 <K210_FPIOA(41, K210_PCF_SCCB_SCLK)>, 104 <K210_FPIOA(42, K210_PCF_DVP_RST)>, 105 <K210_FPIOA(43, K210_PCF_DVP_VSYNC)>, 106 <K210_FPIOA(44, K210_PCF_DVP_PWDN)>, 107 <K210_FPIOA(45, K210_PCF_DVP_HSYNC)>, 108 <K210_FPIOA(46, K210_PCF_DVP_XCLK)>, 109 <K210_FPIOA(47, K210_PCF_DVP_PCLK)>; 110 }; 111}; 112 113&uarths0 { 114 pinctrl-0 = <&uarths_pinctrl>; 115 pinctrl-names = "default"; 116 status = "okay"; 117}; 118 119&gpio0 { 120 pinctrl-0 = <&gpiohs_pinctrl>; 121 pinctrl-names = "default"; 122 status = "okay"; 123}; 124 125&gpio1 { 126 pinctrl-0 = <&gpio_pinctrl>; 127 pinctrl-names = "default"; 128 status = "okay"; 129}; 130 131&i2s0 { 132 #sound-dai-cells = <1>; 133 pinctrl-0 = <&i2s0_pinctrl>; 134 pinctrl-names = "default"; 135}; 136 137&i2c1 { 138 pinctrl-0 = <&i2c1_pinctrl>; 139 pinctrl-names = "default"; 140 clock-frequency = <400000>; 141 status = "okay"; 142}; 143 144&spi0 { 145 pinctrl-0 = <&spi0_pinctrl>; 146 pinctrl-names = "default"; 147 num-cs = <1>; 148 cs-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; 149 150 panel@0 { 151 compatible = "sitronix,st7789v"; 152 reg = <0>; 153 reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>; 154 dc-gpios = <&gpio0 22 0>; 155 spi-max-frequency = <15000000>; 156 power-supply = <&vcc_3v3>; 157 }; 158}; 159 160&spi1 { 161 pinctrl-0 = <&spi1_pinctrl>; 162 pinctrl-names = "default"; 163 num-cs = <1>; 164 cs-gpios = <&gpio1_0 2 GPIO_ACTIVE_LOW>; 165 status = "okay"; 166 167 slot@0 { 168 compatible = "mmc-spi-slot"; 169 reg = <0>; 170 voltage-ranges = <3300 3300>; 171 spi-max-frequency = <25000000>; 172 broken-cd; 173 }; 174}; 175 176&spi3 { 177 flash@0 { 178 compatible = "jedec,spi-nor"; 179 reg = <0>; 180 spi-max-frequency = <50000000>; 181 spi-tx-bus-width = <4>; 182 spi-rx-bus-width = <4>; 183 m25p,fast-read; 184 broken-flash-reset; 185 }; 186};