cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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hifive-unmatched-a00.dts (4916B)


      1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
      2/* Copyright (c) 2020 SiFive, Inc */
      3
      4#include "fu740-c000.dtsi"
      5#include <dt-bindings/gpio/gpio.h>
      6#include <dt-bindings/interrupt-controller/irq.h>
      7
      8/* Clock frequency (in Hz) of the PCB crystal for rtcclk */
      9#define RTCCLK_FREQ		1000000
     10
     11/ {
     12	model = "SiFive HiFive Unmatched A00";
     13	compatible = "sifive,hifive-unmatched-a00", "sifive,fu740-c000",
     14		     "sifive,fu740";
     15
     16	chosen {
     17		stdout-path = "serial0";
     18	};
     19
     20	cpus {
     21		timebase-frequency = <RTCCLK_FREQ>;
     22	};
     23
     24	memory@80000000 {
     25		device_type = "memory";
     26		reg = <0x0 0x80000000 0x4 0x00000000>;
     27	};
     28
     29	hfclk: hfclk {
     30		#clock-cells = <0>;
     31		compatible = "fixed-clock";
     32		clock-frequency = <26000000>;
     33		clock-output-names = "hfclk";
     34	};
     35
     36	rtcclk: rtcclk {
     37		#clock-cells = <0>;
     38		compatible = "fixed-clock";
     39		clock-frequency = <RTCCLK_FREQ>;
     40		clock-output-names = "rtcclk";
     41	};
     42
     43	gpio-poweroff {
     44		compatible = "gpio-poweroff";
     45		gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
     46	};
     47};
     48
     49&uart0 {
     50	status = "okay";
     51};
     52
     53&uart1 {
     54	status = "okay";
     55};
     56
     57&i2c0 {
     58	status = "okay";
     59
     60	temperature-sensor@4c {
     61		compatible = "ti,tmp451";
     62		reg = <0x4c>;
     63		vcc-supply = <&vdd_bpro>;
     64		interrupt-parent = <&gpio>;
     65		interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
     66	};
     67
     68	eeprom@54 {
     69		compatible = "microchip,24c02", "atmel,24c02";
     70		reg = <0x54>;
     71		vcc-supply = <&vdd_bpro>;
     72		label = "board-id";
     73		pagesize = <16>;
     74		read-only;
     75		size = <256>;
     76	};
     77
     78	pmic@58 {
     79		compatible = "dlg,da9063";
     80		reg = <0x58>;
     81		interrupt-parent = <&gpio>;
     82		interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
     83		interrupt-controller;
     84
     85		onkey {
     86			compatible = "dlg,da9063-onkey";
     87		};
     88
     89		rtc {
     90			compatible = "dlg,da9063-rtc";
     91		};
     92
     93		wdt {
     94			compatible = "dlg,da9063-watchdog";
     95		};
     96
     97		regulators {
     98			vdd_bcore: bcores-merged {
     99				regulator-min-microvolt = <1050000>;
    100				regulator-max-microvolt = <1050000>;
    101				regulator-min-microamp = <4800000>;
    102				regulator-max-microamp = <4800000>;
    103				regulator-always-on;
    104			};
    105
    106			vdd_bpro: bpro {
    107				regulator-min-microvolt = <1800000>;
    108				regulator-max-microvolt = <1800000>;
    109				regulator-min-microamp = <2400000>;
    110				regulator-max-microamp = <2400000>;
    111				regulator-always-on;
    112			};
    113
    114			vdd_bperi: bperi {
    115				regulator-min-microvolt = <1060000>;
    116				regulator-max-microvolt = <1060000>;
    117				regulator-min-microamp = <1500000>;
    118				regulator-max-microamp = <1500000>;
    119				regulator-always-on;
    120			};
    121
    122			vdd_bmem_bio: bmem-bio-merged {
    123				regulator-min-microvolt = <1200000>;
    124				regulator-max-microvolt = <1200000>;
    125				regulator-min-microamp = <3000000>;
    126				regulator-max-microamp = <3000000>;
    127				regulator-always-on;
    128			};
    129
    130			vdd_ldo1: ldo1 {
    131				regulator-min-microvolt = <1800000>;
    132				regulator-max-microvolt = <1800000>;
    133				regulator-always-on;
    134			};
    135
    136			vdd_ldo2: ldo2 {
    137				regulator-min-microvolt = <1800000>;
    138				regulator-max-microvolt = <1800000>;
    139				regulator-always-on;
    140			};
    141
    142			vdd_ldo3: ldo3 {
    143				regulator-min-microvolt = <3300000>;
    144				regulator-max-microvolt = <3300000>;
    145				regulator-always-on;
    146			};
    147
    148			vdd_ldo4: ldo4 {
    149				regulator-min-microvolt = <2500000>;
    150				regulator-max-microvolt = <2500000>;
    151				regulator-always-on;
    152			};
    153
    154			vdd_ldo5: ldo5 {
    155				regulator-min-microvolt = <3300000>;
    156				regulator-max-microvolt = <3300000>;
    157				regulator-always-on;
    158			};
    159
    160			vdd_ldo6: ldo6 {
    161				regulator-min-microvolt = <1800000>;
    162				regulator-max-microvolt = <1800000>;
    163				regulator-always-on;
    164			};
    165
    166			vdd_ldo7: ldo7 {
    167				regulator-min-microvolt = <3300000>;
    168				regulator-max-microvolt = <3300000>;
    169				regulator-always-on;
    170			};
    171
    172			vdd_ldo8: ldo8 {
    173				regulator-min-microvolt = <3300000>;
    174				regulator-max-microvolt = <3300000>;
    175				regulator-always-on;
    176			};
    177
    178			vdd_ld09: ldo9 {
    179				regulator-min-microvolt = <1050000>;
    180				regulator-max-microvolt = <1050000>;
    181				regulator-always-on;
    182			};
    183
    184			vdd_ldo10: ldo10 {
    185				regulator-min-microvolt = <1000000>;
    186				regulator-max-microvolt = <1000000>;
    187				regulator-always-on;
    188			};
    189
    190			vdd_ldo11: ldo11 {
    191				regulator-min-microvolt = <2500000>;
    192				regulator-max-microvolt = <2500000>;
    193				regulator-always-on;
    194			};
    195		};
    196	};
    197};
    198
    199&qspi0 {
    200	status = "okay";
    201	flash@0 {
    202		compatible = "jedec,spi-nor";
    203		reg = <0>;
    204		spi-max-frequency = <50000000>;
    205		m25p,fast-read;
    206		spi-tx-bus-width = <4>;
    207		spi-rx-bus-width = <4>;
    208	};
    209};
    210
    211&spi0 {
    212	status = "okay";
    213	mmc@0 {
    214		compatible = "mmc-spi-slot";
    215		reg = <0>;
    216		spi-max-frequency = <20000000>;
    217		voltage-ranges = <3300 3300>;
    218		disable-wp;
    219		gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
    220	};
    221};
    222
    223&eth0 {
    224	status = "okay";
    225	phy-mode = "gmii";
    226	phy-handle = <&phy0>;
    227	phy0: ethernet-phy@0 {
    228		reg = <0>;
    229	};
    230};
    231
    232&pwm0 {
    233	status = "okay";
    234};
    235
    236&pwm1 {
    237	status = "okay";
    238};
    239
    240&gpio {
    241	status = "okay";
    242	gpio-line-names = "J29.1", "PMICNTB", "PMICSHDN", "J8.1", "J8.3",
    243		"PCIe_PWREN", "THERM", "UBRDG_RSTN", "PCIe_PERSTN",
    244		"ULPI_RSTN", "J8.2", "UHUB_RSTN", "GEMGXL_RST", "J8.4",
    245		"EN_VDD_SD", "SD_CD";
    246};